From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37785) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XF82j-0007oY-Kk for qemu-devel@nongnu.org; Wed, 06 Aug 2014 16:42:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XF82b-00051q-Ra for qemu-devel@nongnu.org; Wed, 06 Aug 2014 16:42:41 -0400 Received: from e7.ny.us.ibm.com ([32.97.182.137]:33909) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XF82b-00050O-Jl for qemu-devel@nongnu.org; Wed, 06 Aug 2014 16:42:33 -0400 Received: from /spool/local by e7.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 6 Aug 2014 16:42:33 -0400 From: Michael Roth Date: Wed, 6 Aug 2014 15:38:46 -0500 Message-Id: <1407357598-21541-37-git-send-email-mdroth@linux.vnet.ibm.com> In-Reply-To: <1407357598-21541-1-git-send-email-mdroth@linux.vnet.ibm.com> References: <1407357598-21541-1-git-send-email-mdroth@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH 036/108] target-arm: Make vbar_write 64bit friendly on 32bit hosts List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias Reviewed-by: Alex Bennée Message-id: 1398926097-28097-2-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell (cherry picked from commit fed3ffb9f157f33bc9b2b1c3ef68e710ee6b7b4b) Signed-off-by: Michael Roth --- target-arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 55077ed..420a66d 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -632,7 +632,7 @@ static void vbar_write(CPUARMState *env, const ARMCPRegInfo *ri, * contexts. (ARMv8 would permit us to do no masking at all, but ARMv7 * requires the bottom five bits to be RAZ/WI because they're UNK/SBZP.) */ - env->cp15.c12_vbar = value & ~0x1Ful; + env->cp15.c12_vbar = value & ~0x1FULL; } static uint64_t ccsidr_read(CPUARMState *env, const ARMCPRegInfo *ri) -- 1.9.1