From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55799) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XGvCc-0005OF-97 for qemu-devel@nongnu.org; Mon, 11 Aug 2014 15:24:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XGvCT-0002XX-4R for qemu-devel@nongnu.org; Mon, 11 Aug 2014 15:24:18 -0400 From: Tom Musta Date: Mon, 11 Aug 2014 14:23:27 -0500 Message-Id: <1407785009-6538-7-git-send-email-tommusta@gmail.com> In-Reply-To: <1407785009-6538-1-git-send-email-tommusta@gmail.com> References: <1407785009-6538-1-git-send-email-tommusta@gmail.com> Subject: [Qemu-devel] [PATCH 6/8] target-ppc: Bug Fix: mulldo OV Detection List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Tom Musta , agraf@suse.de Fix the code to properly detect overflow; the 128 bit signed product must have all zeroes or all ones in the first 65 bits otherwise OV should be set. Signed-off-by: Tom Musta --- target-ppc/int_helper.c | 14 ++++++++++++-- 1 files changed, 12 insertions(+), 2 deletions(-) diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index f6e8846..e83a25d 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -32,12 +32,22 @@ uint64_t helper_mulldo(CPUPPCState *env, uint64_t arg1, uint64_t arg2) uint64_t tl; muls64(&tl, (uint64_t *)&th, arg1, arg2); - /* If th != 0 && th != -1, then we had an overflow */ - if (likely((uint64_t)(th + 1) <= 1)) { + + /* th should either contain all 1 bits or all 0 bits and should + * match the sign bit of tl; otherwise we have overflowed. */ + + if ((int64_t)tl < 0) { + if (likely(th == -1LL)) { + env->ov = 0; + } else { + env->so = env->ov = 1; + } + } else if (likely(th == 0LL)) { env->ov = 0; } else { env->so = env->ov = 1; } + return (int64_t)tl; } #endif -- 1.7.1