From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55839) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XGvCh-0005X7-E3 for qemu-devel@nongnu.org; Mon, 11 Aug 2014 15:24:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XGvCY-0002YO-3D for qemu-devel@nongnu.org; Mon, 11 Aug 2014 15:24:23 -0400 From: Tom Musta Date: Mon, 11 Aug 2014 14:23:28 -0500 Message-Id: <1407785009-6538-8-git-send-email-tommusta@gmail.com> In-Reply-To: <1407785009-6538-1-git-send-email-tommusta@gmail.com> References: <1407785009-6538-1-git-send-email-tommusta@gmail.com> Subject: [Qemu-devel] [PATCH 7/8] target-ppc: Bug Fix: srawi List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Tom Musta , agraf@suse.de For 64 bit implementations, the special case of a shift by zero should result in the sign extension of the least significant 32 bits of the source GPR (not a direct copy of the 64 bit source GPR). Signed-off-by: Tom Musta --- target-ppc/translate.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 4904665..61fa42d 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -1941,7 +1941,7 @@ static void gen_srawi(DisasContext *ctx) TCGv dst = cpu_gpr[rA(ctx->opcode)]; TCGv src = cpu_gpr[rS(ctx->opcode)]; if (sh == 0) { - tcg_gen_mov_tl(dst, src); + tcg_gen_ext32s_tl(dst, src); tcg_gen_movi_tl(cpu_ca, 0); } else { TCGv t0; -- 1.7.1