From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40219) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XHCHi-00016g-1S for qemu-devel@nongnu.org; Tue, 12 Aug 2014 09:38:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XHCHd-0008Ad-76 for qemu-devel@nongnu.org; Tue, 12 Aug 2014 09:38:41 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47932) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XHCHc-0008AR-Un for qemu-devel@nongnu.org; Tue, 12 Aug 2014 09:38:37 -0400 From: Stefan Hajnoczi Date: Tue, 12 Aug 2014 14:37:54 +0100 Message-Id: <1407850675-11890-18-git-send-email-stefanha@redhat.com> In-Reply-To: <1407850675-11890-1-git-send-email-stefanha@redhat.com> References: <1407850675-11890-1-git-send-email-stefanha@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 17/18] trace: add some tcg tracing support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Stefan Hajnoczi From: Alex Benn=C3=A9e This adds a couple of tcg specific trace-events which are useful for tracing execution though tcg generated blocks. It's been tested with lttng user space tracing but is generic enough for all systems. The tcg events are: * translate_block - when a subject block is translated * exec_tb - when a translated block is entered * exec_tb_exit - when we exit the translated code * exec_tb_nocache - special case translations Of course we can only trace the entrance to the first block of a chain as each block will jump directly to the next when it can. See the -d nochain patch to allow more complete tracing at the expense of performance. Signed-off-by: Alex Benn=C3=A9e Signed-off-by: Stefan Hajnoczi --- cpu-exec.c | 6 ++++++ trace-events | 9 +++++++++ translate-all.c | 3 +++ 3 files changed, 18 insertions(+) diff --git a/cpu-exec.c b/cpu-exec.c index cbc8067..c6aad74 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -18,6 +18,7 @@ */ #include "config.h" #include "cpu.h" +#include "trace.h" #include "disas/disas.h" #include "tcg.h" #include "qemu/atomic.h" @@ -168,6 +169,9 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *= cpu, uint8_t *tb_ptr) #endif /* DEBUG_DISAS */ =20 next_tb =3D tcg_qemu_tb_exec(env, tb_ptr); + trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK), + next_tb & TB_EXIT_MASK); + if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) { /* We didn't start executing this TB (eg because the instruction * counter hit zero); we must restore the guest PC to the addres= s @@ -208,6 +212,7 @@ static void cpu_exec_nocache(CPUArchState *env, int m= ax_cycles, max_cycles); cpu->current_tb =3D tb; /* execute the generated code */ + trace_exec_tb_nocache(tb, tb->pc); cpu_tb_exec(cpu, tb->tc_ptr); cpu->current_tb =3D NULL; tb_phys_invalidate(tb, -1); @@ -749,6 +754,7 @@ int cpu_exec(CPUArchState *env) cpu->current_tb =3D tb; barrier(); if (likely(!cpu->exit_request)) { + trace_exec_tb(tb, tb->pc); tc_ptr =3D tb->tc_ptr; /* execute the generated code */ next_tb =3D cpu_tb_exec(cpu, tc_ptr); diff --git a/trace-events b/trace-events index 11a17a8..dcc33dd 100644 --- a/trace-events +++ b/trace-events @@ -1265,6 +1265,15 @@ kvm_failed_spr_get(int str, const char *msg) "Warn= ing: Unable to retrieve SPR %d kvm_failed_reg_get(uint64_t id, const char *msg) "Warning: Unable to ret= rieve ONEREG %" PRIu64 " from KVM: %s" kvm_failed_reg_set(uint64_t id, const char *msg) "Warning: Unable to set= ONEREG %" PRIu64 " to KVM: %s" =20 +# TCG related tracing (mostly disabled by default) +# cpu-exec.c +disable exec_tb(void *tb, uintptr_t pc) "tb:%p pc=3D0x%"PRIxPTR +disable exec_tb_nocache(void *tb, uintptr_t pc) "tb:%p pc=3D0x%"PRIxPTR +disable exec_tb_exit(void *next_tb, unsigned int flags) "tb:%p flags=3D%= x" + +# translate-all.c +translate_block(void *tb, uintptr_t pc, uint8_t *tb_code) "tb:%p, pc:0x%= "PRIxPTR", tb_code:%p" + # memory.c memory_region_ops_read(void *mr, uint64_t addr, uint64_t value, unsigned= size) "mr %p addr %#"PRIx64" value %#"PRIx64" size %u" memory_region_ops_write(void *mr, uint64_t addr, uint64_t value, unsigne= d size) "mr %p addr %#"PRIx64" value %#"PRIx64" size %u" diff --git a/translate-all.c b/translate-all.c index 8f7e11b..2e0265a 100644 --- a/translate-all.c +++ b/translate-all.c @@ -33,6 +33,7 @@ #include "qemu-common.h" #define NO_CPU_IO_DEFS #include "cpu.h" +#include "trace.h" #include "disas/disas.h" #include "tcg.h" #if defined(CONFIG_USER_ONLY) @@ -158,6 +159,8 @@ int cpu_gen_code(CPUArchState *env, TranslationBlock = *tb, int *gen_code_size_ptr =20 gen_intermediate_code(env, tb); =20 + trace_translate_block(tb, tb->pc, tb->tc_ptr); + /* generate machine code */ gen_code_buf =3D tb->tc_ptr; tb->tb_next_offset[0] =3D 0xffff; --=20 1.9.3