From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44175) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XHbSU-0005ML-B9 for qemu-devel@nongnu.org; Wed, 13 Aug 2014 12:31:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XHbSL-0005vZ-9o for qemu-devel@nongnu.org; Wed, 13 Aug 2014 12:31:30 -0400 Received: from mail-lb0-x233.google.com ([2a00:1450:4010:c04::233]:32907) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XHbSL-0005vM-0b for qemu-devel@nongnu.org; Wed, 13 Aug 2014 12:31:21 -0400 Received: by mail-lb0-f179.google.com with SMTP id v6so8288144lbi.24 for ; Wed, 13 Aug 2014 09:31:17 -0700 (PDT) From: Sergey Fedorov Date: Wed, 13 Aug 2014 20:31:11 +0400 Message-Id: <1407947471-26981-1-git-send-email-serge.fdrv@gmail.com> Subject: [Qemu-devel] [PATCH] hw/intc/arm_gic: honor target mask in gic_update() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Marcel Apfelbaum , Markus Armbruster , Sergey Fedorov , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Christoffer Dall Take IRQ target mask into account when determining the highest priority pending interrupt. Signed-off-by: Sergey Fedorov --- hw/intc/arm_gic.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 1532ef9..a5ad7b9 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -66,7 +66,8 @@ void gic_update(GICState *s) best_prio = 0x100; best_irq = 1023; for (irq = 0; irq < s->num_irq; irq++) { - if (GIC_TEST_ENABLED(irq, cm) && gic_test_pending(s, irq, cm)) { + if (GIC_TEST_ENABLED(irq, cm) && gic_test_pending(s, irq, cm) && + (irq < GIC_INTERNAL || GIC_TARGET(irq) & cm)) { if (GIC_GET_PRIORITY(irq, cpu) < best_prio) { best_prio = GIC_GET_PRIORITY(irq, cpu); best_irq = irq; -- 1.9.1