From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
qemu-stable@nongnu.org, Anthony Liguori <aliguori@amazon.com>,
Jan Kiszka <jan.kiszka@siemens.com>
Subject: [Qemu-devel] [PULL 01/12] pci: Use bus master address space for delivering MSI/MSI-X messages
Date: Thu, 14 Aug 2014 18:08:44 +0200 [thread overview]
Message-ID: <1408032488-11096-2-git-send-email-mst@redhat.com> (raw)
In-Reply-To: <1408032488-11096-1-git-send-email-mst@redhat.com>
From: Jan Kiszka <jan.kiszka@siemens.com>
The spec says (and real HW confirms this) that, if the bus master bit
is 0, the device will not generate any PCI accesses. MSI and MSI-X
messages fall among these, so we should use the corresponding address
space to deliver them. This will prevent delivery if bus master support
is disabled.
Cc: qemu-stable@nongnu.org
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/pci/msi.c | 2 +-
hw/pci/msix.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/pci/msi.c b/hw/pci/msi.c
index a4a3040..52d2313 100644
--- a/hw/pci/msi.c
+++ b/hw/pci/msi.c
@@ -291,7 +291,7 @@ void msi_notify(PCIDevice *dev, unsigned int vector)
"notify vector 0x%x"
" address: 0x%"PRIx64" data: 0x%"PRIx32"\n",
vector, msg.address, msg.data);
- stl_le_phys(&address_space_memory, msg.address, msg.data);
+ stl_le_phys(&dev->bus_master_as, msg.address, msg.data);
}
/* Normally called by pci_default_write_config(). */
diff --git a/hw/pci/msix.c b/hw/pci/msix.c
index 5c49bfc..20ae476 100644
--- a/hw/pci/msix.c
+++ b/hw/pci/msix.c
@@ -439,7 +439,7 @@ void msix_notify(PCIDevice *dev, unsigned vector)
msg = msix_get_message(dev, vector);
- stl_le_phys(&address_space_memory, msg.address, msg.data);
+ stl_le_phys(&dev->bus_master_as, msg.address, msg.data);
}
void msix_reset(PCIDevice *dev)
--
MST
next prev parent reply other threads:[~2014-08-14 16:08 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-14 16:08 [Qemu-devel] [PULL 00/12] post-2.1 bugfixes Michael S. Tsirkin
2014-08-14 16:08 ` Michael S. Tsirkin [this message]
2014-09-08 13:32 ` [Qemu-devel] [PULL 01/12] pci: Use bus master address space for delivering MSI/MSI-X messages Michael S. Tsirkin
2014-08-14 16:08 ` [Qemu-devel] [PULL 02/12] pc: Create 2.2 machine type Michael S. Tsirkin
2014-08-14 16:08 ` [Qemu-devel] [PULL 03/12] hw/audio/intel-hda: Fix MSI capability address Michael S. Tsirkin
2014-08-14 16:08 ` [Qemu-devel] [PULL 04/12] hw:i386: typo fix: MEMORY_HOPTLUG_DEVICE -> MEMORY_HOTPLUG_DEVICE Michael S. Tsirkin
2014-08-14 16:08 ` [Qemu-devel] [PULL 05/12] pc-dimm: validate node property Michael S. Tsirkin
2014-08-14 16:09 ` [Qemu-devel] [PULL 06/12] pc-dimm: fix up error message Michael S. Tsirkin
2014-08-14 16:09 ` [Qemu-devel] [PULL 07/12] numa: show hex number in error message for consistency and prefix them with 0x Michael S. Tsirkin
2014-08-14 18:57 ` Eduardo Habkost
2014-08-14 19:22 ` Michael S. Tsirkin
2014-08-14 16:09 ` [Qemu-devel] [PULL 08/12] acpi: align RSDP Michael S. Tsirkin
2014-08-14 16:09 ` [Qemu-devel] [PULL 09/12] ivshmem: fix building when debug mode is enabled Michael S. Tsirkin
2014-08-14 16:09 ` [Qemu-devel] [PULL 10/12] e1000: correctly handle phy_ctrl reserved & self-clearing bits Michael S. Tsirkin
2014-08-14 16:09 ` [Qemu-devel] [PULL 11/12] e1000: use symbolic constants to init phy ctrl & status registers Michael S. Tsirkin
2014-08-14 16:09 ` [Qemu-devel] [PULL 12/12] pc: Get rid of pci-info leftovers Michael S. Tsirkin
2014-08-15 17:43 ` [Qemu-devel] [PULL 00/12] post-2.1 bugfixes Peter Maydell
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