From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38877) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XJJa1-0000yt-GG for qemu-devel@nongnu.org; Mon, 18 Aug 2014 05:50:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XJJZu-000881-DW for qemu-devel@nongnu.org; Mon, 18 Aug 2014 05:50:21 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:42046) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XJJZu-0007tG-7Z for qemu-devel@nongnu.org; Mon, 18 Aug 2014 05:50:14 -0400 From: Peter Maydell Date: Mon, 18 Aug 2014 10:48:40 +0100 Message-Id: <1408355320-802-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH] target-arm: Fix return address for A64 BRK instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Akos Kiss , David Long , patches@linaro.org When we take an exception resulting from a BRK instruction, the architecture requires that the "preferred return address" reported to the exception handler is the address of the BRK itself, not the following instruction (like undefined insns, and in contrast with SVC, HVC and SMC). Follow this, rather than incorrectly reporting the address of the following insn. (We do get this correct for the A32/T32 BKPT insns.) Signed-off-by: Peter Maydell --- target-arm/translate-a64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 33b5025..fc319d5 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -1454,7 +1454,7 @@ static void disas_exc(DisasContext *s, uint32_t insn) break; } /* BRK */ - gen_exception_insn(s, 0, EXCP_BKPT, syn_aa64_bkpt(imm16)); + gen_exception_insn(s, 4, EXCP_BKPT, syn_aa64_bkpt(imm16)); break; case 2: if (op2_ll != 0) { -- 1.9.1