From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53052) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XJc6n-0007YV-3f for qemu-devel@nongnu.org; Tue, 19 Aug 2014 01:37:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XJc6b-0002nm-Vh for qemu-devel@nongnu.org; Tue, 19 Aug 2014 01:37:25 -0400 Received: from nschwmtas04p.mx.bigpond.com ([61.9.189.146]:17655) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XJc6b-0002ma-Kr for qemu-devel@nongnu.org; Tue, 19 Aug 2014 01:37:13 -0400 From: gerg@uclinux.org Date: Tue, 19 Aug 2014 15:37:06 +1000 Message-Id: <1408426627-12071-3-git-send-email-gerg@uclinux.org> In-Reply-To: <1408426627-12071-1-git-send-email-gerg@uclinux.org> References: <1408426627-12071-1-git-send-email-gerg@uclinux.org> Subject: [Qemu-devel] [PATCH 2/3] m68k: implement move to/from usp register instruction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Greg Ungerer From: Greg Ungerer Fill out the code support for the move to/from usp instructions. They are being decoded, but there is no code to support there actions. So add it. Current versions of Linux running on the ColdFire 5208 use these instructions. Signed-off-by: Greg Ungerer Reviewed-by: Richard Henderson --- target-m68k/translate.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index efd4cfc..5a6666a 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -1995,8 +1995,8 @@ DISAS_INSN(move_from_usp) gen_exception(s, s->pc - 2, EXCP_PRIVILEGE); return; } - /* TODO: Implement USP. */ - gen_exception(s, s->pc - 2, EXCP_ILLEGAL); + tcg_gen_ld_i32(AREG(insn, 0), cpu_env, + offsetof(CPUM68KState, sp[M68K_USP])); } DISAS_INSN(move_to_usp) @@ -2005,8 +2005,8 @@ DISAS_INSN(move_to_usp) gen_exception(s, s->pc - 2, EXCP_PRIVILEGE); return; } - /* TODO: Implement USP. */ - gen_exception(s, s->pc - 2, EXCP_ILLEGAL); + tcg_gen_st_i32(AREG(insn, 0), cpu_env, + offsetof(CPUM68KState, sp[M68K_USP])); } DISAS_INSN(halt) -- 1.9.1