From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54063) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XK1V5-0006ef-Vp for qemu-devel@nongnu.org; Wed, 20 Aug 2014 04:44:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XK1Uu-0001v1-Rv for qemu-devel@nongnu.org; Wed, 20 Aug 2014 04:44:11 -0400 Received: from aserp1040.oracle.com ([141.146.126.69]:17481) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XK1Uu-0001uw-LC for qemu-devel@nongnu.org; Wed, 20 Aug 2014 04:44:00 -0400 Message-ID: <1408524215.14053.77.camel@abi.no.oracle.com> From: Knut Omang Date: Wed, 20 Aug 2014 10:43:35 +0200 In-Reply-To: <33183CC9F5247A488A2544077AF1902086D6179F@SZXEMA503-MBS.china.huawei.com> References: <1408517610.25437.103.camel@ori.omang.mine.nu> <33183CC9F5247A488A2544077AF1902086D6179F@SZXEMA503-MBS.china.huawei.com> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 3/3] ioh3420: Support ARI forwarding List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Gonglei (Arei)" Cc: Marcel Apfelbaum , Alexey Kardashevskiy , Juan Quintela , Markus Armbruster , "qemu-devel@nongnu.org" , "Michael S.Tsirkin" , Igor Mammedov , Paolo Bonzini On Wed, 2014-08-20 at 08:34 +0000, Gonglei (Arei) wrote: > Hi, > > > Subject: [PATCH 3/3] ioh3420: Support ARI forwarding > > > > > > Enable the PCIe capability bit that indicates that this port is able to support > > and forward requests to > 8 functions for ARI capable devices. > > > > Signed-off-by: Knut Omang > > --- > > hw/pci-bridge/ioh3420.c | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > I think you should associate patch 2/3 with patch 3/3 to > one patch, otherwise after patch 2/3 building are broken. > > Best regards, > -Gonglei Thanks - just noticed - somehow I managed tp break the split of those two changes since they are independent. Knut > > diff --git a/hw/pci-bridge/ioh3420.c b/hw/pci-bridge/ioh3420.c > > index 8f6c8b0..c14ea6b 100644 > > --- a/hw/pci-bridge/ioh3420.c > > +++ b/hw/pci-bridge/ioh3420.c > > @@ -92,8 +92,10 @@ static void ioh3420_reset(DeviceState *qdev) > > > > static int ioh3420_initfn(PCIDevice *d) > > { > > + PCIBridge* br = PCI_BRIDGE(d); > > PCIEPort *p = PCIE_PORT(d); > > PCIESlot *s = PCIE_SLOT(d); > > + uint8_t *exp_cap; > > int rc; > > char tmp[100]; > > sprintf(tmp, "pcie_port.%d", s->slot); > > @@ -121,6 +123,10 @@ static int ioh3420_initfn(PCIDevice *d) > > if (rc < 0) { > > goto err_msi; > > } > > + /* Support ARI forwarding */ > > + exp_cap = d->config + d->exp.exp_cap; > > + pci_word_test_and_set_mask(exp_cap + PCI_EXP_DEVCAP2, > > PCI_EXP_DEVCAP2_ARI); > > + > > pcie_cap_deverr_init(d); > > pcie_cap_slot_init(d, s->slot); > > pcie_chassis_create(s->chassis); > > @@ -151,6 +157,7 @@ err_bridge: > > static void ioh3420_exitfn(PCIDevice *d) > > { > > PCIESlot *s = PCIE_SLOT(d); > > + PCIBridge* br = PCI_BRIDGE(d); > > > > pcie_aer_exit(d); > > pcie_chassis_del_slot(s); > > -- > > 1.9.0 > > >