From: Marcel Apfelbaum <marcel.a@redhat.com>
To: "Gonglei (Arei)" <arei.gonglei@huawei.com>
Cc: "peter.crosthwaite@xilinx.com" <peter.crosthwaite@xilinx.com>,
"Huangweidong (C)" <weidong.huang@huawei.com>,
"mst@redhat.com" <mst@redhat.com>,
"armbru@redhat.com" <armbru@redhat.com>,
Luonengjun <luonengjun@huawei.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"Huangpeng (Peter)" <peter.huangpeng@huawei.com>,
"imammedo@redhat.com" <imammedo@redhat.com>,
"pbonzini@redhat.com" <pbonzini@redhat.com>,
"afaerber@suse.de" <afaerber@suse.de>
Subject: Re: [Qemu-devel] [PATCH 2/2] pci: add check for pcie root ports and downstream ports
Date: Wed, 20 Aug 2014 11:47:21 +0300 [thread overview]
Message-ID: <1408524441.13594.45.camel@localhost.localdomain> (raw)
In-Reply-To: <33183CC9F5247A488A2544077AF1902086D613E4@SZXEMA503-MBS.china.huawei.com>
On Wed, 2014-08-20 at 03:20 +0000, Gonglei (Arei) wrote:
> Hi,
>
> > > Right now, ARI Forwarding dose not support in QEMU.
> > I would replace the above sentence with "ARI Forwarding is not supported".
> >
> OK.
>
> > By the way, there is some support for ARI, I don't know if
> > is enabled yet. I'll have a look.
> >
> MST had pointed out the pcie_ari_init(), but not completed.
>
> > > According to PCIe spec section 7.3.1, only slot 0 with
> > > the device attached to logic bus representing the link from
> > > downstream ports and root ports.
> > >
> > > So, adding check about slot 0 for PCIe downstream ports and
> > > root ports, which avoid useless operation, both hotplug and
> > > coldplug.
> > >
> > > Signed-off-by: Gonglei <arei.gonglei@huawei.com>
> > > ---
> > > hw/pci/pci.c | 41 +++++++++++++++++++++++++++++++++++++++++
> > > 1 file changed, 41 insertions(+)
> > >
> > > diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> > > index 351d320..f2d267f 100644
> > > --- a/hw/pci/pci.c
> > > +++ b/hw/pci/pci.c
> > > @@ -773,6 +773,42 @@ static int pci_init_multifunction(PCIBus *bus,
> > PCIDevice *dev)
> > > return 0;
> > > }
> > >
> > > +static int pci_check_pcie_port(PCIBus *bus, PCIDevice *dev)
> > > +{
> > > + Object *obj = OBJECT(bus);
> > > +
> > > + if (!strcmp(object_get_typename(obj), TYPE_PCIE_BUS)) {
> > Maybe there is another way to check that this is a PCIe bus?
> >
> Yes. Paolo has said that object_dynamic_cast() is appropriated.
>
> > > + DeviceState *parent = qbus_get_parent(BUS(obj));
> > > + const char *name = object_get_typename(OBJECT(parent));
> > > +
> > > + /*
> > > + * Root ports and downstream ports of switches are the hot
> > > + * pluggable ports in a PCI Express hierarchy.
> > > + * PCI Express supports chip-to-chip interconnect, a PCIe link can
> > > + * only connect one pci device/Switch/EndPoint or PCI-bridge.
> > > + *
> > > + * 7.3. Configuration Transaction Rules (PCI Express specification
> > 3.0)
> > > + * 7.3.1. Device Number
> > > + *
> > > + * Downstream Ports that do not have ARI Forwarding enabled
> > must
> > > + * associate only Device 0 with the device attached to the Logical
> > Bus
> > > + * representing the Link from the Port.
> > > + *
> > > + * Right now, ARI Forwarding dose not support. So, only slot 0 is
> > As above, maybe replace it with "ARI Forwarding is not supported"
> >
> OK.
>
> > > + * supported, regardless of hotplug or coldplug.
> > > + */
> > > + if (!strcmp(name, "ioh3420") || !strcmp(name,
> > "xio3130-downstream")) {
> > Please use port_type flag from extended configuration space, don't use device
> > names.
> > If you need help for this, let me know.
> >
> Yes, please. I appreciate very much that you can help me.
Sure,
I checked and we already have the pcie_cap_get_type function that returns the port type.
port_type = pcie_cap_get_type(dev);
if (port_type == PCI_EXP_TYPE_DOWNSTREAM ||
port_type == PCI_EXP_TYPE_ROOT_PORT) {
...
}
Thanks,
Marcel
>
> > > + if (PCI_SLOT(dev->devfn) != 0) {
> > > + error_report("Unsupported PCI slot %d for %s ports,
> > only "
> > > + "supported slot 0",
> > PCI_SLOT(dev->devfn), name);
> > > + return -1;
> > > + }
> > > + }
> > > + }
> > > +
> > > + return 0;
> > > +}
> > > +
> > > static void pci_config_alloc(PCIDevice *pci_dev)
> > > {
> > > int config_size = pci_config_size(pci_dev);
> > > @@ -871,6 +907,11 @@ static PCIDevice
> > *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
> > > return NULL;
> > > }
> > >
> > > + if (pci_check_pcie_port(bus, pci_dev)) {
> > > + do_pci_unregister_device(pci_dev);
> > > + return NULL;
> > > + }
> > It is possible to move the above check earlier in do_pci_register_device
> > function?
> > Maybe move it into the first if statement(s)?
> >
> Agreed, Thanks, Marcel.
>
> Best regards,
> -Gonglei
next prev parent reply other threads:[~2014-08-20 8:55 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-19 13:08 [Qemu-devel] [PATCH 0/2] add check for PCIe root ports and downstream ports arei.gonglei
2014-08-19 13:08 ` [Qemu-devel] [PATCH 1/2] qdev: Introduce a function to get qbus's parent arei.gonglei
2014-08-19 13:08 ` [Qemu-devel] [PATCH 2/2] pci: add check for pcie root ports and downstream ports arei.gonglei
2014-08-19 14:37 ` Marcel Apfelbaum
2014-08-19 15:09 ` Paolo Bonzini
2014-08-20 3:10 ` Gonglei (Arei)
2014-08-20 3:20 ` Gonglei (Arei)
2014-08-20 8:47 ` Marcel Apfelbaum [this message]
2014-08-20 9:06 ` Gonglei (Arei)
2014-08-19 21:23 ` [Qemu-devel] [PATCH 0/2] add check for PCIe " Michael S. Tsirkin
2014-08-20 3:03 ` Gonglei (Arei)
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1408524441.13594.45.camel@localhost.localdomain \
--to=marcel.a@redhat.com \
--cc=afaerber@suse.de \
--cc=arei.gonglei@huawei.com \
--cc=armbru@redhat.com \
--cc=imammedo@redhat.com \
--cc=luonengjun@huawei.com \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peter.crosthwaite@xilinx.com \
--cc=peter.huangpeng@huawei.com \
--cc=qemu-devel@nongnu.org \
--cc=weidong.huang@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).