From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60554) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XMh9s-0003c4-IH for qemu-devel@nongnu.org; Wed, 27 Aug 2014 13:37:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XMh9b-0002tg-TI for qemu-devel@nongnu.org; Wed, 27 Aug 2014 13:37:20 -0400 Received: from e33.co.us.ibm.com ([32.97.110.151]:39308) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XMh9b-0002tF-Lk for qemu-devel@nongnu.org; Wed, 27 Aug 2014 13:37:03 -0400 Received: from /spool/local by e33.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 27 Aug 2014 11:37:03 -0600 From: Michael Roth Date: Wed, 27 Aug 2014 12:36:03 -0500 Message-Id: <1409160982-16389-7-git-send-email-mdroth@linux.vnet.ibm.com> In-Reply-To: <1409160982-16389-1-git-send-email-mdroth@linux.vnet.ibm.com> References: <1409160982-16389-1-git-send-email-mdroth@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH 06/25] pci: Use bus master address space for delivering MSI/MSI-X messages List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org From: Jan Kiszka The spec says (and real HW confirms this) that, if the bus master bit is 0, the device will not generate any PCI accesses. MSI and MSI-X messages fall among these, so we should use the corresponding address space to deliver them. This will prevent delivery if bus master support is disabled. Cc: qemu-stable@nongnu.org Signed-off-by: Jan Kiszka Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin (cherry picked from commit cc943c36faa192cd4b32af8fe5edb31894017d35) Signed-off-by: Michael Roth --- hw/pci/msi.c | 2 +- hw/pci/msix.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/pci/msi.c b/hw/pci/msi.c index a4a3040..52d2313 100644 --- a/hw/pci/msi.c +++ b/hw/pci/msi.c @@ -291,7 +291,7 @@ void msi_notify(PCIDevice *dev, unsigned int vector) "notify vector 0x%x" " address: 0x%"PRIx64" data: 0x%"PRIx32"\n", vector, msg.address, msg.data); - stl_le_phys(&address_space_memory, msg.address, msg.data); + stl_le_phys(&dev->bus_master_as, msg.address, msg.data); } /* Normally called by pci_default_write_config(). */ diff --git a/hw/pci/msix.c b/hw/pci/msix.c index 5c49bfc..20ae476 100644 --- a/hw/pci/msix.c +++ b/hw/pci/msix.c @@ -439,7 +439,7 @@ void msix_notify(PCIDevice *dev, unsigned vector) msg = msix_get_message(dev, vector); - stl_le_phys(&address_space_memory, msg.address, msg.data); + stl_le_phys(&dev->bus_master_as, msg.address, msg.data); } void msix_reset(PCIDevice *dev) -- 1.9.1