From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43556) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XN3Vq-0004aZ-AS for qemu-devel@nongnu.org; Thu, 28 Aug 2014 13:29:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XN3Vk-0005dB-71 for qemu-devel@nongnu.org; Thu, 28 Aug 2014 13:29:30 -0400 From: Paolo Bonzini Date: Thu, 28 Aug 2014 19:15:08 +0200 Message-Id: <1409246113-6519-13-git-send-email-pbonzini@redhat.com> In-Reply-To: <1409246113-6519-1-git-send-email-pbonzini@redhat.com> References: <1409246113-6519-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PATCH 12/17] ppc: use movcond for isel List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: dgibson@redhat.com, qemu-ppc@nongnu.org, tommusta@gmail.com Signed-off-by: Paolo Bonzini --- target-ppc/translate.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 67f13f7..48c7b66 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -789,27 +789,26 @@ static void gen_cmpli(DisasContext *ctx) /* isel (PowerPC 2.03 specification) */ static void gen_isel(DisasContext *ctx) { - int l1, l2; uint32_t bi = rC(ctx->opcode); uint32_t mask; TCGv_i32 t0; - - l1 = gen_new_label(); - l2 = gen_new_label(); + TCGv t1, true_op, zero; mask = 1 << (3 - (bi & 0x03)); t0 = tcg_temp_new_i32(); tcg_gen_andi_i32(t0, cpu_crf[bi >> 2], mask); - tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 0, l1); + t1 = tcg_temp_new(); + tcg_gen_extu_i32_tl(t1, t0); + zero = tcg_const_tl(0); if (rA(ctx->opcode) == 0) - tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], 0); + true_op = zero; else - tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); - tcg_gen_br(l2); - gen_set_label(l1); - tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); - gen_set_label(l2); - tcg_temp_free_i32(t0); + true_op = cpu_gpr[rA(ctx->opcode)]; + + tcg_gen_movcond_tl(cpu_gpr[rD(ctx->opcode)], t1, zero, + true_op, cpu_gpr[rB(ctx->opcode)], TCG_COND_NE); + tcg_temp_free_i32(t1); + tcg_temp_free(zero); } /* cmpb: PowerPC 2.05 specification */ -- 1.8.3.1