From: Jaume Marti Farriol <jaume.martif@gmail.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH v2 8/8] target-i386: x87 exception pointers using TCG.
Date: Thu, 28 Aug 2014 22:44:40 +0200 [thread overview]
Message-ID: <1409258680-15555-9-git-send-email-jaume.martif@gmail.com> (raw)
In-Reply-To: <1409258680-15555-1-git-send-email-jaume.martif@gmail.com>
Hello,
This patch contains changes to the tests/tcg/test-i386.c file to test the storage of the x87 exception pointers by instructions fnstenv and fxsave.
Best regards,
Jaume
test-i386.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++----
1 file changed, 62 insertions(+), 4 deletions(-)
signed-off: jaume.martif@gmail.com
diff --git a/tests/tcg/test-i386.c b/tests/tcg/test-i386.c
index b05572b..3f34c2c 100644
--- a/tests/tcg/test-i386.c
+++ b/tests/tcg/test-i386.c
@@ -2322,17 +2322,61 @@ void test_sse_comi(double a1, double b1)
r.l[0]);\
}
-struct fpxstate {
+struct fnstate {
uint16_t fpuc;
+ uint16_t dummy0;
uint16_t fpus;
+ uint16_t dummy1;
uint16_t fptag;
- uint16_t fop;
+ uint16_t dummy2;
uint32_t fpuip;
uint16_t cs_sel;
- uint16_t dummy0;
+ uint16_t fop;
uint32_t fpudp;
uint16_t ds_sel;
- uint16_t dummy1;
+};
+
+static struct fnstate fn_state __attribute__((aligned(16)));
+float tmp_mem_operand;
+
+void test_fnstenv(void)
+{
+ struct fnstate *fp = &fn_state;
+
+ asm(" fld1\n"
+ " fmul tmp_mem_operand\n"
+ " fnstenv %0\n"
+ : "=m" (*(uint32_t *)fp) : );
+ printf("fpuc=%04x\n", fp->fpuc);
+ printf("fpus=%04x\n", fp->fpus);
+ printf("fptag=%04x\n", fp->fptag);
+ printf("fpuip=%04x\n", fp->fpuip);
+ printf("cs_sel=%04x\n", fp->cs_sel);
+ printf("fpudp=%04x\n", fp->fpudp);
+ printf("ds_sel=%04x\n", fp->ds_sel);
+}
+
+struct fpxstate {
+ uint16_t fpuc;
+ uint16_t fpus;
+ uint16_t fptag;
+ uint16_t fop;
+ union {
+ struct {
+ uint32_t fpuip;
+ uint16_t cs_sel;
+ uint16_t dummy0;
+ } mode_non_64_ins;
+ uint64_t mode_64_fpuip;
+ };
+ union {
+ struct {
+ uint32_t fpudp;
+ uint16_t ds_sel;
+ uint16_t dummy1;
+ } mode_non_64_data;
+ uint64_t mode_64_fpudp;
+ };
uint32_t mxcsr;
uint32_t mxcsr_mask;
uint8_t fpregs1[8 * 16];
@@ -2362,6 +2406,7 @@ void test_fxsave(void)
" fld1\n"
" fldpi\n"
" fldln2\n"
+ " fmul tmp_mem_operand\n"
" fxsave %0\n"
" fxrstor %0\n"
" fxsave %1\n"
@@ -2371,6 +2416,18 @@ void test_fxsave(void)
printf("fpuc=%04x\n", fp->fpuc);
printf("fpus=%04x\n", fp->fpus);
printf("fptag=%04x\n", fp->fptag);
+#if defined(__x86_64__)
+ printf("fpuip=%04llx\n", (long long unsigned int) fp->mode_64_fpuip);
+#else
+ printf("fpuip=%04x\n", fp->mode_non_64_ins.fpuip);
+ printf("cs_sel=%04x\n", fp->mode_non_64_ins.cs_sel);
+#endif
+#if defined(__x86_64__)
+ printf("fpudp=%04llx\n", (long long unsigned int) fp->mode_64_fpudp);
+#else
+ printf("fpudp=%04x\n", fp->mode_non_64_data.fpudp);
+ printf("ds_sel=%04x\n", fp->mode_non_64_data.ds_sel);
+#endif
for(i = 0; i < 3; i++) {
printf("ST%d: " FMT64X " %04x\n",
i,
@@ -2757,6 +2814,7 @@ int main(int argc, char **argv)
#endif
test_enter();
test_conv();
+ test_fnstenv();
#ifdef TEST_SSE
test_sse();
test_fxsave();
prev parent reply other threads:[~2014-08-28 20:41 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-28 20:44 [Qemu-devel] [PATCH v2 0/8] target-i386: x87 exception pointers using TCG Jaume Marti Farriol
2014-08-28 20:44 ` [Qemu-devel] [PATCH v2 1/8] " Jaume Marti Farriol
2014-08-29 22:19 ` Richard Henderson
2014-08-28 20:44 ` [Qemu-devel] [PATCH v2 2/8] " Jaume Marti Farriol
2014-08-29 22:57 ` Richard Henderson
2014-08-30 21:40 ` Jaume Martí
2014-08-28 20:44 ` [Qemu-devel] [PATCH v2 3/8] " Jaume Marti Farriol
2014-08-29 22:58 ` Richard Henderson
2014-08-30 21:42 ` Jaume Martí
2014-08-28 20:44 ` [Qemu-devel] [PATCH v2 4/8] " Jaume Marti Farriol
2014-08-29 22:59 ` Richard Henderson
2014-08-28 20:44 ` [Qemu-devel] [PATCH v2 5/8] " Jaume Marti Farriol
2014-08-28 20:44 ` [Qemu-devel] [PATCH v2 6/8] " Jaume Marti Farriol
2014-08-28 20:44 ` [Qemu-devel] [PATCH v2 7/8] " Jaume Marti Farriol
2014-08-28 20:44 ` Jaume Marti Farriol [this message]
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