From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38049) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XNKGb-0007eE-MV for qemu-devel@nongnu.org; Fri, 29 Aug 2014 07:22:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XNKGU-00072t-Br for qemu-devel@nongnu.org; Fri, 29 Aug 2014 07:22:53 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:46718) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XNKGU-00070y-5M for qemu-devel@nongnu.org; Fri, 29 Aug 2014 07:22:46 -0400 From: Peter Maydell Date: Fri, 29 Aug 2014 12:21:28 +0100 Message-Id: <1409311292-18860-7-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1409311292-18860-1-git-send-email-peter.maydell@linaro.org> References: <1409311292-18860-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 06/10] target-arm: Move extended_addresses_enabled() to internals.h List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Richard Henderson , =?UTF-8?q?Andreas=20F=C3=A4rber?= , patches@linaro.org Move the utility function extended_addresses_enabled() into internals.h; we're going to need to call it from op_helper.c. Signed-off-by: Peter Maydell --- target-arm/helper.c | 11 ----------- target-arm/internals.h | 11 +++++++++++ 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 406b9bc..7963807 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -304,17 +304,6 @@ void init_cpreg_list(ARMCPU *cpu) g_list_free(keys); } -/* Return true if extended addresses are enabled. - * This is always the case if our translation regime is 64 bit, - * but depends on TTBCR.EAE for 32 bit. - */ -static inline bool extended_addresses_enabled(CPUARMState *env) -{ - return arm_el_is_aa64(env, 1) - || ((arm_feature(env, ARM_FEATURE_LPAE) - && (env->cp15.c2_control & TTBCR_EAE))); -} - static void dacr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { ARMCPU *cpu = arm_env_get_cpu(env); diff --git a/target-arm/internals.h b/target-arm/internals.h index 22f382c..1d788b0 100644 --- a/target-arm/internals.h +++ b/target-arm/internals.h @@ -142,6 +142,17 @@ static inline void update_spsel(CPUARMState *env, uint32_t imm) aarch64_restore_sp(env, cur_el); } +/* Return true if extended addresses are enabled. + * This is always the case if our translation regime is 64 bit, + * but depends on TTBCR.EAE for 32 bit. + */ +static inline bool extended_addresses_enabled(CPUARMState *env) +{ + return arm_el_is_aa64(env, 1) + || ((arm_feature(env, ARM_FEATURE_LPAE) + && (env->cp15.c2_control & TTBCR_EAE))); +} + /* Valid Syndrome Register EC field values */ enum arm_exception_class { EC_UNCATEGORIZED = 0x00, -- 1.9.1