From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49879) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XNNJ8-00079o-Bl for qemu-devel@nongnu.org; Fri, 29 Aug 2014 10:37:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XNNIw-00080q-Tk for qemu-devel@nongnu.org; Fri, 29 Aug 2014 10:37:42 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:46762) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XNNIw-000805-MO for qemu-devel@nongnu.org; Fri, 29 Aug 2014 10:37:30 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1XNNIv-00052E-SL for qemu-devel@nongnu.org; Fri, 29 Aug 2014 15:37:29 +0100 From: Peter Maydell Date: Fri, 29 Aug 2014 15:37:27 +0100 Message-Id: <1409323049-19255-16-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1409323049-19255-1-git-send-email-peter.maydell@linaro.org> References: <1409323049-19255-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 15/16] target-arm: Remove old code and replace with new functions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: Alistair Francis Remove the old PMCCNTR code and replace it with calls to the new pmccntr_sync() and arm_ccnt_enabled() functions. Signed-off-by: Alistair Francis Signed-off-by: Peter Crosthwaite Message-id: 693a6e437d915c2195fd3dc7303f384ca538b7bf.1409025949.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell --- target-arm/helper.c | 27 ++++----------------------- 1 file changed, 4 insertions(+), 23 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index fa79dfa..d213ed1 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -580,20 +580,7 @@ void pmccntr_sync(CPUARMState *env) static void pmcr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { - uint64_t temp_ticks; - - temp_ticks = muldiv64(qemu_clock_get_us(QEMU_CLOCK_VIRTUAL), - get_ticks_per_sec(), 1000000); - - if (env->cp15.c9_pmcr & PMCRE) { - /* If the counter is enabled */ - if (env->cp15.c9_pmcr & PMCRD) { - /* Increment once every 64 processor clock cycles */ - env->cp15.c15_ccnt = (temp_ticks/64) - env->cp15.c15_ccnt; - } else { - env->cp15.c15_ccnt = temp_ticks - env->cp15.c15_ccnt; - } - } + pmccntr_sync(env); if (value & PMCRC) { /* The counter has been reset */ @@ -604,20 +591,14 @@ static void pmcr_write(CPUARMState *env, const ARMCPRegInfo *ri, env->cp15.c9_pmcr &= ~0x39; env->cp15.c9_pmcr |= (value & 0x39); - if (env->cp15.c9_pmcr & PMCRE) { - if (env->cp15.c9_pmcr & PMCRD) { - /* Increment once every 64 processor clock cycles */ - temp_ticks /= 64; - } - env->cp15.c15_ccnt = temp_ticks - env->cp15.c15_ccnt; - } + pmccntr_sync(env); } static uint64_t pmccntr_read(CPUARMState *env, const ARMCPRegInfo *ri) { uint64_t total_ticks; - if (!(env->cp15.c9_pmcr & PMCRE)) { + if (!arm_ccnt_enabled(env)) { /* Counter is disabled, do not change value */ return env->cp15.c15_ccnt; } @@ -637,7 +618,7 @@ static void pmccntr_write(CPUARMState *env, const ARMCPRegInfo *ri, { uint64_t total_ticks; - if (!(env->cp15.c9_pmcr & PMCRE)) { + if (!arm_ccnt_enabled(env)) { /* Counter is disabled, set the absolute value */ env->cp15.c15_ccnt = value; return; -- 1.9.1