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From: Bharata B Rao <bharata@linux.vnet.ibm.com>
To: qemu-devel@nongnu.org
Cc: mdroth@linux.vnet.ibm.com, Bharata B Rao <bharata@linux.vnet.ibm.com>
Subject: [Qemu-devel] [RFC PATCH v0 05/15] ppc: Accommodate CPU DRC entries in DRC table
Date: Thu,  4 Sep 2014 11:36:15 +0530	[thread overview]
Message-ID: <1409810785-12391-6-git-send-email-bharata@linux.vnet.ibm.com> (raw)
In-Reply-To: <1409810785-12391-1-git-send-email-bharata@linux.vnet.ibm.com>

Extend the DRC table to accommodate CPU DRC entries too. Generalize
spapr_add_phb_to_drc_table() to add CPU entries too.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
---
 hw/ppc/spapr.c         | 73 +++++++++++++++++++++++++++++++++++++-------------
 include/hw/ppc/spapr.h |  8 +++++-
 2 files changed, 62 insertions(+), 19 deletions(-)

diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index bdbda1f..441a4a7 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -105,6 +105,9 @@ struct sPAPRMachineState {
 
 sPAPREnvironment *spapr;
 
+#define SPAPR_DRC_ENTRY_TYPE_PHB 1
+#define SPAPR_DRC_ENTRY_TYPE_CPU 2
+
 static XICSState *try_create_xics(const char *type, int nr_servers,
                                   int nr_irqs)
 {
@@ -313,7 +316,7 @@ sPAPRDrcEntry *spapr_find_drc_entry(int drc_index)
 {
     int i, j;
 
-    for (i = 0; i < SPAPR_DRC_PHB_TABLE_SIZE; i++) {
+    for (i = 0; i < SPAPR_DRC_TABLE_SIZE; i++) {
         sPAPRDrcEntry *phb_entry = &spapr->drc_table[i];
         if (phb_entry->drc_index == drc_index) {
             return phb_entry;
@@ -335,22 +338,38 @@ sPAPRDrcEntry *spapr_find_drc_entry(int drc_index)
 static void spapr_init_drc_table(void)
 {
     int i;
+    int smt = kvmppc_smt_threads();
 
     memset(spapr->drc_table, 0, sizeof(spapr->drc_table));
 
-    /* For now we only care about PHB entries */
+    /* PHB entries */
     for (i = 0; i < SPAPR_DRC_PHB_TABLE_SIZE; i++) {
         spapr->drc_table[i].drc_index = 0x2000001 + i;
     }
+
+    /* CPU entries */
+    for (; i < SPAPR_DRC_TABLE_SIZE; i++) {
+        spapr->drc_table[i].drc_index = SPAPR_DRC_CPU_ID_BASE +
+            smt * (i - SPAPR_DRC_PHB_TABLE_SIZE);
+    }
 }
 
-sPAPRDrcEntry *spapr_add_phb_to_drc_table(uint64_t buid, uint32_t state)
+static sPAPRDrcEntry *spapr_add_to_drc_table(int type, uint64_t buid,
+    uint32_t state)
 {
     sPAPRDrcEntry *empty_drc = NULL;
     sPAPRDrcEntry *found_drc = NULL;
-    int i, phb_index;
+    int i, phb_index, start, end;
 
-    for (i = 0; i < SPAPR_DRC_PHB_TABLE_SIZE; i++) {
+    if (type == SPAPR_DRC_ENTRY_TYPE_PHB) {
+        start = 0;
+        end = SPAPR_DRC_PHB_TABLE_SIZE;
+    } else {
+        start = SPAPR_DRC_PHB_TABLE_SIZE;
+        end = SPAPR_DRC_TABLE_SIZE;
+    }
+
+    for (i = start; i < end; i++) {
         if (spapr->drc_table[i].id == 0) {
             empty_drc = &spapr->drc_table[i];
         }
@@ -372,12 +391,14 @@ sPAPRDrcEntry *spapr_add_phb_to_drc_table(uint64_t buid, uint32_t state)
         empty_drc->cc_state.offset = 0;
         empty_drc->cc_state.depth = 0;
         empty_drc->cc_state.state = CC_STATE_IDLE;
-        empty_drc->child_entries =
-            g_malloc0(sizeof(sPAPRDrcEntry) * SPAPR_DRC_PHB_SLOT_MAX);
-        phb_index = buid - SPAPR_PCI_BASE_BUID;
-        for (i = 0; i < SPAPR_DRC_PHB_SLOT_MAX; i++) {
-            empty_drc->child_entries[i].drc_index =
-                SPAPR_DRC_DEV_ID_BASE + (phb_index << 8) + (i << 3);
+        if (type == SPAPR_DRC_ENTRY_TYPE_PHB) {
+            empty_drc->child_entries =
+                g_malloc0(sizeof(sPAPRDrcEntry) * SPAPR_DRC_PHB_SLOT_MAX);
+            phb_index = buid - SPAPR_PCI_BASE_BUID;
+            for (i = 0; i < SPAPR_DRC_PHB_SLOT_MAX; i++) {
+                empty_drc->child_entries[i].drc_index =
+                    SPAPR_DRC_DEV_ID_BASE + (phb_index << 8) + (i << 3);
+            }
         }
         return empty_drc;
     }
@@ -385,10 +406,15 @@ sPAPRDrcEntry *spapr_add_phb_to_drc_table(uint64_t buid, uint32_t state)
     return NULL;
 }
 
+sPAPRDrcEntry *spapr_add_phb_to_drc_table(uint64_t buid, uint32_t state)
+{
+    return spapr_add_to_drc_table(SPAPR_DRC_ENTRY_TYPE_PHB, buid, state);
+}
+
 static void spapr_create_drc_dt_entries(void *fdt)
 {
     char char_buf[1024];
-    uint32_t int_buf[SPAPR_DRC_PHB_TABLE_SIZE + 1];
+    uint32_t int_buf[SPAPR_DRC_TABLE_SIZE + 1];
     uint32_t *entries;
     int offset, fdt_offset;
     int i, ret;
@@ -397,9 +423,9 @@ static void spapr_create_drc_dt_entries(void *fdt)
 
     /* ibm,drc-indexes */
     memset(int_buf, 0, sizeof(int_buf));
-    int_buf[0] = cpu_to_be32(SPAPR_DRC_PHB_TABLE_SIZE);
+    int_buf[0] = cpu_to_be32(SPAPR_DRC_TABLE_SIZE);
 
-    for (i = 1; i <= SPAPR_DRC_PHB_TABLE_SIZE; i++) {
+    for (i = 1; i <= SPAPR_DRC_TABLE_SIZE; i++) {
         int_buf[i] = cpu_to_be32(spapr->drc_table[i-1].drc_index);
     }
 
@@ -411,9 +437,9 @@ static void spapr_create_drc_dt_entries(void *fdt)
 
     /* ibm,drc-power-domains */
     memset(int_buf, 0, sizeof(int_buf));
-    int_buf[0] = cpu_to_be32(SPAPR_DRC_PHB_TABLE_SIZE);
+    int_buf[0] = cpu_to_be32(SPAPR_DRC_TABLE_SIZE);
 
-    for (i = 1; i <= SPAPR_DRC_PHB_TABLE_SIZE; i++) {
+    for (i = 1; i <= SPAPR_DRC_TABLE_SIZE; i++) {
         int_buf[i] = cpu_to_be32(0xffffffff);
     }
 
@@ -426,7 +452,7 @@ static void spapr_create_drc_dt_entries(void *fdt)
     /* ibm,drc-names */
     memset(char_buf, 0, sizeof(char_buf));
     entries = (uint32_t *)&char_buf[0];
-    *entries = cpu_to_be32(SPAPR_DRC_PHB_TABLE_SIZE);
+    *entries = cpu_to_be32(SPAPR_DRC_TABLE_SIZE);
     offset = sizeof(*entries);
 
     for (i = 0; i < SPAPR_DRC_PHB_TABLE_SIZE; i++) {
@@ -434,6 +460,12 @@ static void spapr_create_drc_dt_entries(void *fdt)
         char_buf[offset++] = '\0';
     }
 
+    for (; i < SPAPR_DRC_PHB_TABLE_SIZE; i++) {
+        offset += sprintf(char_buf + offset, "CPU %d",
+            (i - SPAPR_DRC_PHB_TABLE_SIZE));
+        char_buf[offset++] = '\0';
+    }
+
     ret = fdt_setprop(fdt, fdt_offset, "ibm,drc-names", char_buf, offset);
     if (ret) {
         fprintf(stderr, "Couldn't finalize ibm,drc-names property\n");
@@ -442,7 +474,7 @@ static void spapr_create_drc_dt_entries(void *fdt)
     /* ibm,drc-types */
     memset(char_buf, 0, sizeof(char_buf));
     entries = (uint32_t *)&char_buf[0];
-    *entries = cpu_to_be32(SPAPR_DRC_PHB_TABLE_SIZE);
+    *entries = cpu_to_be32(SPAPR_DRC_TABLE_SIZE);
     offset = sizeof(*entries);
 
     for (i = 0; i < SPAPR_DRC_PHB_TABLE_SIZE; i++) {
@@ -450,6 +482,11 @@ static void spapr_create_drc_dt_entries(void *fdt)
         char_buf[offset++] = '\0';
     }
 
+    for (; i < SPAPR_DRC_TABLE_SIZE; i++) {
+        offset += sprintf(char_buf + offset, "CPU");
+        char_buf[offset++] = '\0';
+    }
+
     ret = fdt_setprop(fdt, fdt_offset, "ibm,drc-types", char_buf, offset);
     if (ret) {
         fprintf(stderr, "Couldn't finalize ibm,drc-types property\n");
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index d7f9562..cb45175 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -15,6 +15,12 @@ struct sPAPRNVRAM;
 #define SPAPR_DRC_PHB_SLOT_MAX    32
 #define SPAPR_DRC_DEV_ID_BASE     0x40000000
 
+#define SPAPR_DRC_CPU_TABLE_SIZE  64
+#define SPAPR_DRC_CPU_ID_BASE     0x10000000
+
+#define SPAPR_DRC_TABLE_SIZE      \
+        (SPAPR_DRC_PHB_TABLE_SIZE + SPAPR_DRC_CPU_TABLE_SIZE)
+
 typedef struct sPAPRConfigureConnectorState {
     void *fdt;
     int offset_start;
@@ -72,7 +78,7 @@ typedef struct sPAPREnvironment {
     int htab_fd;
 
     /* state for Dynamic Reconfiguration Connectors */
-    sPAPRDrcEntry drc_table[SPAPR_DRC_PHB_TABLE_SIZE];
+    sPAPRDrcEntry drc_table[SPAPR_DRC_TABLE_SIZE];
 
     /* Platform state - sensors and indicators */
     uint32_t state;
-- 
1.7.11.7

  parent reply	other threads:[~2014-09-04  6:07 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-04  6:06 [Qemu-devel] [RFC PATCH v0 00/15] CPU hotplug support of PowerPC sPAPR guests Bharata B Rao
2014-09-04  6:06 ` [Qemu-devel] [RFC PATCH v0 01/15] ppc: Store dr entity state bits at the right bit offset Bharata B Rao
2014-09-04  6:06 ` [Qemu-devel] [RFC PATCH v0 02/15] ppc: Rename SPAPR_DRC_TABLE_SIZE to SPAPR_DRC_PHB_TABLE_SIZE Bharata B Rao
2014-09-04  6:06 ` [Qemu-devel] [RFC PATCH v0 03/15] ppc: Rename sPAPRDrcEntry.phb_buid to sPAPRDrcEntry.id Bharata B Rao
2014-09-04  6:06 ` [Qemu-devel] [RFC PATCH v0 04/15] ppc: Make creation of DRC entries in FDT endian safe Bharata B Rao
2014-09-04  6:06 ` Bharata B Rao [this message]
2014-09-04  6:06 ` [Qemu-devel] [RFC PATCH v0 06/15] ppc: stop after getting first unused DR slot in DRC table Bharata B Rao
2014-09-04  6:06 ` [Qemu-devel] [RFC PATCH v0 07/15] ppc: Initialize DRC table before initializing CPUs Bharata B Rao
2014-09-04  6:06 ` [Qemu-devel] [RFC PATCH v0 08/15] ppc: Add CPU dynamic reconfiguration (DR) support Bharata B Rao
2014-09-04  6:06 ` [Qemu-devel] [RFC PATCH v0 09/15] ppc: Consider max_cpus during xics initialization Bharata B Rao
2014-09-04  6:06 ` [Qemu-devel] [RFC PATCH v0 10/15] ppc: Factor out CPU initialization code to a new routine Bharata B Rao
2014-09-26 15:29   ` Igor Mammedov
2014-09-29  3:00     ` Bharata B Rao
2014-09-29  8:49       ` Igor Mammedov
2014-09-04  6:06 ` [Qemu-devel] [RFC PATCH v0 11/15] ppc: Move RTAS indicator defines to a header file Bharata B Rao
2014-09-04  6:06 ` [Qemu-devel] [RFC PATCH v0 12/15] ppc: Support ibm, lrdr-capacity device tree property Bharata B Rao
2014-09-04  6:06 ` [Qemu-devel] [RFC PATCH v0 13/15] ppc: Make ibm, configure-connector endian-safe Bharata B Rao
2014-09-04  6:06 ` [Qemu-devel] [RFC PATCH v0 14/15] ppc: Add CPU hotplug support for sPAPR guests Bharata B Rao
2014-09-05 21:51   ` Tyrel Datwyler
2014-09-04  6:06 ` [Qemu-devel] [RFC PATCH v0 15/15] ppc: Allow hotplugging of CPU cores only Bharata B Rao

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