From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52196) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XPbLk-0007cB-9p for qemu-devel@nongnu.org; Thu, 04 Sep 2014 14:01:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XPbLb-0003d4-9k for qemu-devel@nongnu.org; Thu, 04 Sep 2014 14:01:36 -0400 Received: from mail-pd0-x22e.google.com ([2607:f8b0:400e:c02::22e]:42593) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XPbLb-0003cQ-3d for qemu-devel@nongnu.org; Thu, 04 Sep 2014 14:01:27 -0400 Received: by mail-pd0-f174.google.com with SMTP id v10so762435pde.5 for ; Thu, 04 Sep 2014 11:01:24 -0700 (PDT) From: Chih-Min Chao Date: Fri, 5 Sep 2014 02:01:16 +0800 Message-Id: <1409853677-10966-2-git-send-email-cmchao@gmail.com> In-Reply-To: <1409853677-10966-1-git-send-email-cmchao@gmail.com> References: <1409853677-10966-1-git-send-email-cmchao@gmail.com> Subject: [Qemu-devel] [PATCH 1/2] target-arm : make parameter of feature/status checking function const List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Chih-Min Chao CPUARMState is one of parameter used by is_a64 arm_feature arm_el_is_aa64 They only read it without any side effect and shold be changed to const parameter Signed-off-by: Chih-Min Chao --- target-arm/cpu.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 51bedc8..d7f1776 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -340,7 +340,7 @@ ARMCPU *cpu_arm_init(const char *cpu_model); int cpu_arm_exec(CPUARMState *s); uint32_t do_arm_semihosting(CPUARMState *env); -static inline bool is_a64(CPUARMState *env) +static inline bool is_a64(const CPUARMState *env) { return env->aarch64; } @@ -677,13 +677,13 @@ enum arm_features { ARM_FEATURE_V8_PMULL, /* implements PMULL part of v8 Crypto Extensions */ }; -static inline int arm_feature(CPUARMState *env, int feature) +static inline int arm_feature(const CPUARMState *env, int feature) { return (env->features & (1ULL << feature)) != 0; } /* Return true if the specified exception level is running in AArch64 state. */ -static inline bool arm_el_is_aa64(CPUARMState *env, int el) +static inline bool arm_el_is_aa64(const CPUARMState *env, int el) { /* We don't currently support EL2 or EL3, and this isn't valid for EL0 * (if we're in EL0, is_a64() is what you want, and if we're not in EL0 -- 2.0.4