[Qemu-devel] [PATCH 0/2] target-arm : improvement

[Qemu-devel] [PATCH 0/2] target-arm : improvement

[Chih-Min Chao]

    make CPUARMState const to attribute checking functions and use them
    to reduce internal status exposure

Chih-Min Chao (2):
  target-arm : make parameter of feature/status checking function const
  target-arm : use aarch64 mode testing wrapper

 hw/arm/boot.c    | 4 ++--
 target-arm/cpu.h | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

-- 
2.0.4

[Qemu-devel] [PATCH 1/2] target-arm : make parameter of feature/status checking function const

[Chih-Min Chao]

    CPUARMState is one of parameter used by
        is_a64
        arm_feature
        arm_el_is_aa64
    They only read it without any side effect and shold be changed to
    const parameter

Signed-off-by: Chih-Min Chao <cmchao@gmail.com>
---
 target-arm/cpu.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 51bedc8..d7f1776 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -340,7 +340,7 @@ ARMCPU *cpu_arm_init(const char *cpu_model);
 int cpu_arm_exec(CPUARMState *s);
 uint32_t do_arm_semihosting(CPUARMState *env);
 
-static inline bool is_a64(CPUARMState *env)
+static inline bool is_a64(const CPUARMState *env)
 {
     return env->aarch64;
 }
@@ -677,13 +677,13 @@ enum arm_features {
     ARM_FEATURE_V8_PMULL, /* implements PMULL part of v8 Crypto Extensions */
 };
 
-static inline int arm_feature(CPUARMState *env, int feature)
+static inline int arm_feature(const CPUARMState *env, int feature)
 {
     return (env->features & (1ULL << feature)) != 0;
 }
 
 /* Return true if the specified exception level is running in AArch64 state. */
-static inline bool arm_el_is_aa64(CPUARMState *env, int el)
+static inline bool arm_el_is_aa64(const CPUARMState *env, int el)
 {
     /* We don't currently support EL2 or EL3, and this isn't valid for EL0
      * (if we're in EL0, is_a64() is what you want, and if we're not in EL0
-- 
2.0.4

Re: [Qemu-devel] [PATCH 1/2] target-arm : make parameter of feature/status checking function const

[Peter Maydell]

On 4 September 2014 19:01, Chih-Min Chao <cmchao@gmail.com> wrote:
>     CPUARMState is one of parameter used by
>         is_a64
>         arm_feature
>         arm_el_is_aa64
>     They only read it without any side effect and shold be changed to
>     const parameter

I guess, but we have lots of functions that just pass
around CPUARMState without it being const even if they
don't actually modify it; why change these ones in
particular?

thanks
-- PMM

Re: [Qemu-devel] [PATCH 1/2] target-arm : make parameter of feature/status checking function const

[Chih-Min Chao]

[-- Attachment #1: Type: text/plain, Size: 655 bytes --]

Just change what I have used and looked  into.
There are no other special reasons.


On Fri, Sep 5, 2014 at 2:05 AM, Peter Maydell <peter.maydell@linaro.org>
wrote:

> On 4 September 2014 19:01, Chih-Min Chao <cmchao@gmail.com> wrote:
> >     CPUARMState is one of parameter used by
> >         is_a64
> >         arm_feature
> >         arm_el_is_aa64
> >     They only read it without any side effect and shold be changed to
> >     const parameter
>
> I guess, but we have lots of functions that just pass
> around CPUARMState without it being const even if they
> don't actually modify it; why change these ones in
> particular?
>
> thanks
> -- PMM
>

[-- Attachment #2: Type: text/html, Size: 1146 bytes --]

[Qemu-devel] [PATCH 2/2] target-arm : use aarch64 mode testing wrapper

[Chih-Min Chao]

    Don't use internal member but availabel wrapper function to
    test status

Signed-off-by: Chih-Min Chao <cmchao@gmail.com>
---
 hw/arm/boot.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index e32f2f4..26bc25f 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -417,7 +417,7 @@ static void do_cpu_reset(void *opaque)
     if (info) {
         if (!info->is_linux) {
             /* Jump to the entry point.  */
-            if (env->aarch64) {
+            if (is_a64(env)) {
                 env->pc = info->entry;
             } else {
                 env->regs[15] = info->entry & 0xfffffffe;
@@ -425,7 +425,7 @@ static void do_cpu_reset(void *opaque)
             }
         } else {
             if (CPU(cpu) == first_cpu) {
-                if (env->aarch64) {
+                if (is_a64(env)) {
                     env->pc = info->loader_start;
                 } else {
                     env->regs[15] = info->loader_start;
-- 
2.0.4

Re: [Qemu-devel] [PATCH 2/2] target-arm : use aarch64 mode testing wrapper

[Peter Maydell]

On 4 September 2014 19:01, Chih-Min Chao <cmchao@gmail.com> wrote:
>     Don't use internal member but availabel wrapper function to
>     test status
>
> Signed-off-by: Chih-Min Chao <cmchao@gmail.com>
> ---
>  hw/arm/boot.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/arm/boot.c b/hw/arm/boot.c
> index e32f2f4..26bc25f 100644
> --- a/hw/arm/boot.c
> +++ b/hw/arm/boot.c
> @@ -417,7 +417,7 @@ static void do_cpu_reset(void *opaque)
>      if (info) {
>          if (!info->is_linux) {
>              /* Jump to the entry point.  */
> -            if (env->aarch64) {
> +            if (is_a64(env)) {
>                  env->pc = info->entry;
>              } else {
>                  env->regs[15] = info->entry & 0xfffffffe;
> @@ -425,7 +425,7 @@ static void do_cpu_reset(void *opaque)
>              }
>          } else {
>              if (CPU(cpu) == first_cpu) {
> -                if (env->aarch64) {
> +                if (is_a64(env)) {
>                      env->pc = info->loader_start;
>                  } else {
>                      env->regs[15] = info->loader_start;
> --
> 2.0.4

Maybe we should make the ARM set_pc CPU object methods
honour the thumb bit in the PC value; then we could just
call the set_pc method rather than having an if() at all.
That would change the behaviour of the gdb step and
continue protocol commands though, so I need to check
what their behaviour is expected to be...

thanks
-- PMM