From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54809) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XPsZp-0008Ge-Tw for qemu-devel@nongnu.org; Fri, 05 Sep 2014 08:25:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XPsZf-0006Pf-VN for qemu-devel@nongnu.org; Fri, 05 Sep 2014 08:25:17 -0400 Received: from mail-wi0-f179.google.com ([209.85.212.179]:41951) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XPsZf-0006PA-PK for qemu-devel@nongnu.org; Fri, 05 Sep 2014 08:25:07 -0400 Received: by mail-wi0-f179.google.com with SMTP id q5so2868991wiv.6 for ; Fri, 05 Sep 2014 05:25:04 -0700 (PDT) From: Ard Biesheuvel Date: Fri, 5 Sep 2014 14:24:52 +0200 Message-Id: <1409919897-360-2-git-send-email-ard.biesheuvel@linaro.org> In-Reply-To: <1409919897-360-1-git-send-email-ard.biesheuvel@linaro.org> References: <1409919897-360-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [Qemu-devel] [PATCH v3 1/6] target-arm: add powered off cpu state List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.maydell@linaro.org, christoffer.dall@linaro.org, qemu-devel@nongnu.org Cc: Rob Herring , Ard Biesheuvel From: Rob Herring Add tracking of cpu power state in order to support powering off of cores in system emuluation. The initial state is determined by the start-powered-off QOM property. Signed-off-by: Rob Herring Signed-off-by: Ard Biesheuvel --- target-arm/cpu-qom.h | 2 ++ target-arm/cpu.c | 7 ++++++- target-arm/machine.c | 5 +++-- 3 files changed, 11 insertions(+), 3 deletions(-) diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index 07f3c9e86639..eae0a7b9c908 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -98,6 +98,8 @@ typedef struct ARMCPU { /* Should CPU start in PSCI powered-off state? */ bool start_powered_off; + /* CPU currently in PSCI powered-off state */ + bool powered_off; /* [QEMU_]KVM_ARM_TARGET_* constant for this CPU, or * QEMU_KVM_ARM_TARGET_NONE if the kernel doesn't support this CPU type. diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 8199f32e3267..b4c06c17cf87 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -40,7 +40,9 @@ static void arm_cpu_set_pc(CPUState *cs, vaddr value) static bool arm_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & + ARMCPU *cpu = ARM_CPU(cs); + + return !cpu->powered_off && cs->interrupt_request & (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB); } @@ -91,6 +93,9 @@ static void arm_cpu_reset(CPUState *s) env->vfp.xregs[ARM_VFP_MVFR1] = cpu->mvfr1; env->vfp.xregs[ARM_VFP_MVFR2] = cpu->mvfr2; + cpu->powered_off = cpu->start_powered_off; + s->halted = cpu->start_powered_off; + if (arm_feature(env, ARM_FEATURE_IWMMXT)) { env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q'; } diff --git a/target-arm/machine.c b/target-arm/machine.c index 3bcc7cc833e0..63329ebd551f 100644 --- a/target-arm/machine.c +++ b/target-arm/machine.c @@ -218,8 +218,8 @@ static int cpu_post_load(void *opaque, int version_id) const VMStateDescription vmstate_arm_cpu = { .name = "cpu", - .version_id = 20, - .minimum_version_id = 20, + .version_id = 21, + .minimum_version_id = 21, .pre_save = cpu_pre_save, .post_load = cpu_post_load, .fields = (VMStateField[]) { @@ -259,6 +259,7 @@ const VMStateDescription vmstate_arm_cpu = { VMSTATE_UINT64(env.exception.vaddress, ARMCPU), VMSTATE_TIMER(gt_timer[GTIMER_PHYS], ARMCPU), VMSTATE_TIMER(gt_timer[GTIMER_VIRT], ARMCPU), + VMSTATE_BOOL(powered_off, ARMCPU), VMSTATE_END_OF_LIST() }, .subsections = (VMStateSubsection[]) { -- 1.8.3.2