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From: Jaume Marti Farriol <jaume.martif@gmail.com>
To: qemu-devel@nongnu.org
Cc: Jaume Marti Farriol <jaume.martif@gmail.com>
Subject: [Qemu-devel] [PATCH v3 0/3] target-i386: x87 exception pointers using TCG.
Date: Sun,  7 Sep 2014 00:31:57 +0200	[thread overview]
Message-ID: <1410042720-17750-1-git-send-email-jaume.martif@gmail.com> (raw)

Hello,

I submit a patch to fix bugs 661696 and 1248376.  This is the third version of this patch.
As mentioned in a previous email, the patch implements, for TCG, the specifications provided in Intel and AMD programmer's manuals regarding the x87 exception pointers. That is, when executing instructions fstenv/fnstenv, fsave and fxsave the values for the instruction pointer, data pointer and opcode of the last non-control x87 instruction executed, are correctly saved to the specified memory address. When executing instructions fldenv, frstor and fxrstor the values that are going to be considered the instruction pointer, data pointer and opcode of the last non-control x87 instruction are obtained from the specified memory address.

Best regards,
Jaume


 linux-user/signal.c      |   4 +-
 target-i386/cpu.h        |  27 ++-
 target-i386/fpu_helper.c | 223 ++++++++++++++++++------
 target-i386/machine.c    |   2 +-
 target-i386/translate.c  | 436 +++++++++++++++++++++++++++++++++--------------
 tests/tcg/test-i386.c    |  71 +++++++-
 6 files changed, 571 insertions(+), 192 deletions(-)

-- 
2.1.0

             reply	other threads:[~2014-09-06 22:29 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-06 22:31 Jaume Marti Farriol [this message]
2014-09-06 22:31 ` [Qemu-devel] [PATCH v3 1/3] target-i386: x87 exception pointers using TCG Jaume Marti Farriol
2014-09-06 22:31 ` [Qemu-devel] [PATCH v3 2/3] " Jaume Marti Farriol
2014-09-06 23:01   ` Jaume Martí
2014-09-06 22:32 ` [Qemu-devel] [PATCH v3 3/3] " Jaume Marti Farriol

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