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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: peter.maydell@linaro.org, qemu-devel@nongnu.org
Cc: Rob Herring <rob.herring@linaro.org>,
	christoffer.dall@linaro.org,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: [Qemu-devel] [PACTH v4 2/6] target-arm: do not set do_interrupt handlers for ARM and AArch64 user modes
Date: Wed, 10 Sep 2014 09:02:47 +0200	[thread overview]
Message-ID: <1410332571-10544-3-git-send-email-ard.biesheuvel@linaro.org> (raw)
In-Reply-To: <1410332571-10544-1-git-send-email-ard.biesheuvel@linaro.org>

From: Rob Herring <rob.herring@linaro.org>

User mode emulation should never get interrupts and thus should not
use the system emulation exception handler function. Remove the reference,
and '#ifndef USER_MODE_ONLY' the function itself as well, so that we can add
system mode only functionality to it.

Signed-off-by: Rob Herring <rob.herring@linaro.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 target-arm/cpu.c        | 2 +-
 target-arm/cpu64.c      | 2 ++
 target-arm/helper-a64.c | 3 +++
 target-arm/helper.c     | 5 -----
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index b4c06c17cf87..55479ec8b226 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -1043,7 +1043,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
 
     cc->class_by_name = arm_cpu_class_by_name;
     cc->has_work = arm_cpu_has_work;
-    cc->do_interrupt = arm_cpu_do_interrupt;
     cc->dump_state = arm_cpu_dump_state;
     cc->set_pc = arm_cpu_set_pc;
     cc->gdb_read_register = arm_cpu_gdb_read_register;
@@ -1051,6 +1050,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
 #ifdef CONFIG_USER_ONLY
     cc->handle_mmu_fault = arm_cpu_handle_mmu_fault;
 #else
+    cc->do_interrupt = arm_cpu_do_interrupt;
     cc->get_phys_page_debug = arm_cpu_get_phys_page_debug;
     cc->vmsd = &vmstate_arm_cpu;
 #endif
diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c
index aa42803959be..9f88b9f4eea0 100644
--- a/target-arm/cpu64.c
+++ b/target-arm/cpu64.c
@@ -196,7 +196,9 @@ static void aarch64_cpu_class_init(ObjectClass *oc, void *data)
 {
     CPUClass *cc = CPU_CLASS(oc);
 
+#if !defined(CONFIG_USER_ONLY)
     cc->do_interrupt = aarch64_cpu_do_interrupt;
+#endif
     cc->set_pc = aarch64_cpu_set_pc;
     cc->gdb_read_register = aarch64_cpu_gdb_read_register;
     cc->gdb_write_register = aarch64_cpu_gdb_write_register;
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
index 2e9ef64786ae..89b913ee9396 100644
--- a/target-arm/helper-a64.c
+++ b/target-arm/helper-a64.c
@@ -438,6 +438,8 @@ uint64_t HELPER(crc32c_64)(uint64_t acc, uint64_t val, uint32_t bytes)
     return crc32c(acc, buf, bytes) ^ 0xffffffff;
 }
 
+#if !defined(CONFIG_USER_ONLY)
+
 /* Handle a CPU exception.  */
 void aarch64_cpu_do_interrupt(CPUState *cs)
 {
@@ -512,3 +514,4 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
     env->pc = addr;
     cs->interrupt_request |= CPU_INTERRUPT_EXITTB;
 }
+#endif
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 2b95f33872cb..9c129c8b080c 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -3237,11 +3237,6 @@ uint32_t HELPER(rbit)(uint32_t x)
 
 #if defined(CONFIG_USER_ONLY)
 
-void arm_cpu_do_interrupt(CPUState *cs)
-{
-    cs->exception_index = -1;
-}
-
 int arm_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
                              int mmu_idx)
 {
-- 
1.8.3.2

  parent reply	other threads:[~2014-09-10  7:03 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-10  7:02 [Qemu-devel] [PACTH v4 0/6] ARM: add PSCI 0.2 support in TCG mode Ard Biesheuvel
2014-09-10  7:02 ` [Qemu-devel] [PACTH v4 1/6] target-arm: add powered off cpu state Ard Biesheuvel
2014-09-10  7:02 ` Ard Biesheuvel [this message]
2014-09-10  7:02 ` [Qemu-devel] [PACTH v4 3/6] target-arm: add hvc and smc exception emulation handling infrastructure Ard Biesheuvel
2014-09-26 10:17   ` Peter Maydell
2014-09-10  7:02 ` [Qemu-devel] [PACTH v4 4/6] target-arm: add missing PSCI constants needed for PSCI emulation Ard Biesheuvel
2014-09-10  7:02 ` [Qemu-devel] [PACTH v4 5/6] target-arm: add emulation of PSCI calls for system emulation Ard Biesheuvel
2014-09-26  9:10   ` Peter Maydell
2014-09-26 15:34     ` Paolo Bonzini
2014-09-10  7:02 ` [Qemu-devel] [PACTH v4 6/6] arm/virt: enable PSCI emulation support " Ard Biesheuvel

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