From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47689) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XS0rl-0007Iv-0g for qemu-devel@nongnu.org; Thu, 11 Sep 2014 05:40:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XS0rc-0006MV-0U for qemu-devel@nongnu.org; Thu, 11 Sep 2014 05:40:36 -0400 Received: from mail-we0-x22a.google.com ([2a00:1450:400c:c03::22a]:64660) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XS0rb-0006M3-MQ for qemu-devel@nongnu.org; Thu, 11 Sep 2014 05:40:27 -0400 Received: by mail-we0-f170.google.com with SMTP id u57so6575541wes.1 for ; Thu, 11 Sep 2014 02:40:26 -0700 (PDT) From: =?UTF-8?q?Marc=20Mar=C3=AD?= Date: Thu, 11 Sep 2014 11:40:16 +0200 Message-Id: <1410428416-5046-1-git-send-email-marc.mari.barcelo@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [TRIVIAL][PATCH v2] libqos virtio: Increase ISR timeout List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Marc=20Mar=C3=AD?= , Peter Maydell , Stefan Hajnoczi Increase the clock step to avoid Travis failure in some builds due to overagressive timeout. Signed-off-by: Marc Marí --- tests/libqos/virtio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/libqos/virtio.c b/tests/libqos/virtio.c index 128dbd0..9b6de2c 100644 --- a/tests/libqos/virtio.c +++ b/tests/libqos/virtio.c @@ -82,7 +82,7 @@ bool qvirtio_wait_queue_isr(const QVirtioBus *bus, QVirtioDevice *d, QVirtQueue *vq, uint64_t timeout) { do { - clock_step(10); + clock_step(100); if (bus->get_queue_isr_status(d, vq)) { break; /* It has ended */ } @@ -95,7 +95,7 @@ bool qvirtio_wait_config_isr(const QVirtioBus *bus, QVirtioDevice *d, uint64_t timeout) { do { - clock_step(10); + clock_step(100); if (bus->get_config_isr_status(d)) { break; /* It has ended */ } -- 1.7.10.4