From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <rth@twiddle.net>, patches@linaro.org
Subject: [Qemu-devel] [PATCH 0/2] target-arm: implement architectural breakpoints
Date: Fri, 12 Sep 2014 13:04:23 +0100 [thread overview]
Message-ID: <1410523465-13400-1-git-send-email-peter.maydell@linaro.org> (raw)
Implement support for the ARM architecturally mandated hardware
breakpoints, for ARMv8 and ARMv7. Tested that hardware bps work
for both v7 and v8 kernels (including v8 compat userspace in a
32 bit kernel).
There are a few odd subfeatures which we don't implement (yet):
* address-mismatch breakpoints which fire if the PC is anything
other than the specified value
* address-mismatch breakpoints with zero byte-address-select,
which fire for every single instruction execution
* unlinked context match breakpoints, which fire for every
instruction executed with a particular value of CONTEXTIDR/VMID
These aren't used by Linux's ptrace support, and I wasn't
sure of the best way to implement them, so for now they just
produce a LOG_UNIMP warning if the guest tries to use them.
This patchset sits on target-arm.next (ie after the watchpoint code).
Peter Maydell (2):
target-arm: Implement setting guest breakpoints
target-arm: Implement handling of breakpoint firing
target-arm/cpu.c | 1 +
target-arm/cpu.h | 1 +
target-arm/helper.c | 126 ++++++++++++++++++++++++++++++++++++++++++++++++-
target-arm/internals.h | 15 ++++++
target-arm/machine.c | 1 +
target-arm/op_helper.c | 75 +++++++++++++++++++++++------
6 files changed, 202 insertions(+), 17 deletions(-)
--
1.9.1
next reply other threads:[~2014-09-12 12:05 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-12 12:04 Peter Maydell [this message]
2014-09-12 12:04 ` [Qemu-devel] [PATCH 1/2] target-arm: Implement setting guest breakpoints Peter Maydell
2014-09-12 12:04 ` [Qemu-devel] [PATCH 2/2] target-arm: Implement handling of breakpoint firing Peter Maydell
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