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From: John Snow <jsnow@redhat.com>
To: qemu-devel@nongnu.org
Cc: jsnow@redhat.com, stefanha@redhat.com, mst@redhat.com
Subject: [Qemu-devel] [RFC 03/10] AHCI: Add PRD interrupt
Date: Sat, 13 Sep 2014 00:34:08 -0400	[thread overview]
Message-ID: <1410582855-21870-4-git-send-email-jsnow@redhat.com> (raw)
In-Reply-To: <1410582855-21870-1-git-send-email-jsnow@redhat.com>

AHCI devices support a feature where individual entries in the
scatter-gather list may have interrupt request bits set, in order
to receive notification partway through a command that a portion
of a transfer has completed. AHCI specs refer to this as the
DPS bit or Descriptor Processed Status. It is named the
"Interrupt on Completion" bit inside the PRDT.

This is not currently feasible in QEMU without reworking the inner
DMA loop extensively, but we can at least record if we saw such
a bit in advance and sent the interrupt at the end of the transfer,
in case a guest is expecting to see the PRD/DPS interrupt bit set.

Signed-off-by: John Snow <jsnow@redhat.com>
---
 hw/ide/ahci.c | 11 +++++++++++
 hw/ide/ahci.h |  5 ++++-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index d3ece78..8e6a352 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -501,6 +501,7 @@ static void ahci_reset_port(AHCIState *s, int port)
     pr->scr_err = 0;
     pr->scr_act = 0;
     d->busy_slot = -1;
+    d->dp_intr_req = false;
     d->init_d2h_sent = false;
 
     ide_state = &s->dev[port].port.ifs[0];
@@ -775,11 +776,15 @@ static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, int offset)
                          ad->hba->as);
         qemu_sglist_add(sglist, le64_to_cpu(tbl[off_idx].addr + off_pos),
                         prdt_tbl_entry_size(&tbl[off_idx]) - off_pos);
+        ad->dp_intr_req = le32_to_cpu(tbl[off_idx].flags_size) & AHCI_PRDT_INTR;
 
         for (i = off_idx + 1; i < sglist_alloc_hint; i++) {
             /* flags_size is zero-based */
             qemu_sglist_add(sglist, le64_to_cpu(tbl[i].addr),
                             prdt_tbl_entry_size(&tbl[i]));
+            if (le32_to_cpu(tbl[i].flags_size) & AHCI_PRDT_INTR) {
+                ad->dp_intr_req = 1;
+            }
         }
     }
 
@@ -1151,6 +1156,11 @@ static int ahci_commit_buf(IDEDMA *dma, int xfer_ok)
 
     qemu_sglist_destroy(&s->sg);
 
+    if (ad->dp_intr_req) {
+        ahci_trigger_irq(ad->hba, ad, PORT_IRQ_SG_DONE);
+        ad->dp_intr_req = 0;
+    }
+
     return s->sg.size != 0;
 }
 
@@ -1307,6 +1317,7 @@ static const VMStateDescription vmstate_ahci_device = {
         VMSTATE_UINT32(port_regs.cmd_issue, AHCIDevice),
         VMSTATE_BOOL(done_atapi_packet, AHCIDevice),
         VMSTATE_INT32(busy_slot, AHCIDevice),
+        VMSTATE_BOOL(dp_intr_req, AHCIDevice),
         VMSTATE_BOOL(init_d2h_sent, AHCIDevice),
         VMSTATE_END_OF_LIST()
     },
diff --git a/hw/ide/ahci.h b/hw/ide/ahci.h
index 1543df7..31f32d3 100644
--- a/hw/ide/ahci.h
+++ b/hw/ide/ahci.h
@@ -180,7 +180,9 @@
 
 #define AHCI_COMMAND_TABLE_ACMD            0x40
 
-#define AHCI_PRDT_SIZE_MASK                0x3fffff
+#define AHCI_PRDT_SIZE_MASK                0x003fffff
+#define AHCI_PRDT_RESERVED                 0x7fc00000
+#define AHCI_PRDT_INTR                     0x80000000
 
 #define IDE_FEATURE_DMA                    1
 
@@ -265,6 +267,7 @@ struct AHCIDevice {
     bool done_atapi_packet;
     int32_t busy_slot;
     bool init_d2h_sent;
+    bool dp_intr_req;
     AHCICmdHdr *cur_cmd;
     NCQTransferState ncq_tfs[AHCI_MAX_CMDS];
 };
-- 
1.9.3

  parent reply	other threads:[~2014-09-13  4:34 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-13  4:34 [Qemu-devel] [RFC 00/10] AHCI Device improvements John Snow
2014-09-13  4:34 ` [Qemu-devel] [RFC 01/10] ide: add is_write() macro for semantic consistency John Snow
2014-09-13 12:54   ` Paolo Bonzini
2014-09-13 17:01     ` John Snow
2014-09-13  4:34 ` [Qemu-devel] [RFC 02/10] AHCI: Update byte count after DMA completion John Snow
2014-09-13 13:21   ` Paolo Bonzini
2014-09-15 20:07     ` John Snow
2014-09-16  7:54       ` Paolo Bonzini
2014-09-13  4:34 ` John Snow [this message]
2014-09-13 13:26   ` [Qemu-devel] [RFC 03/10] AHCI: Add PRD interrupt Paolo Bonzini
2014-09-13 19:50     ` Paolo Bonzini
2014-09-15 16:31       ` John Snow
2014-09-16  7:44         ` Paolo Bonzini
2014-09-15 16:13     ` John Snow
2014-09-13  4:34 ` [Qemu-devel] [RFC 04/10] ide: Correct handling of malformed/short PRDTs John Snow
2014-09-13 13:23   ` Paolo Bonzini
2014-09-13  4:34 ` [Qemu-devel] [RFC 05/10] AHCI: Rename NCQFIS structure fields John Snow
2014-09-13  4:34 ` [Qemu-devel] [RFC 06/10] AHCI: Fix FIS decomposition John Snow
2014-09-13  4:34 ` [Qemu-devel] [RFC 07/10] ide/ahci: Reorder error cases in handle_cmd John Snow
2014-09-13 13:27   ` Paolo Bonzini
2014-09-13  4:34 ` [Qemu-devel] [RFC 08/10] ahci: Check cmd_fis[1] more explicitly John Snow
2014-09-13 13:26   ` Paolo Bonzini
2014-09-13  4:34 ` [Qemu-devel] [RFC 09/10] ahci: factor out FIS decomposition John Snow
2014-09-13 13:27   ` Paolo Bonzini
2014-09-13  4:34 ` [Qemu-devel] [RFC 10/10] AHCI: Fix SDB FIS Construction John Snow

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