From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, afaerber@suse.de, aliguori@amazon.com
Subject: [Qemu-devel] [PATCH 11/23] target-alpha: Use cpu_exec_interrupt qom hook
Date: Sat, 13 Sep 2014 09:45:22 -0700 [thread overview]
Message-ID: <1410626734-3804-12-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1410626734-3804-1-git-send-email-rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
cpu-exec.c | 32 --------------------------------
target-alpha/cpu-qom.h | 1 +
target-alpha/cpu.c | 1 +
target-alpha/helper.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 46 insertions(+), 32 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 7efcf27..2f73be4 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -597,38 +597,6 @@ int cpu_exec(CPUArchState *env)
cc->do_interrupt(cpu);
next_tb = 0;
}
-#elif defined(TARGET_ALPHA)
- {
- int idx = -1;
- /* ??? This hard-codes the OSF/1 interrupt levels. */
- switch (env->pal_mode ? 7 : env->ps & PS_INT_MASK) {
- case 0 ... 3:
- if (interrupt_request & CPU_INTERRUPT_HARD) {
- idx = EXCP_DEV_INTERRUPT;
- }
- /* FALLTHRU */
- case 4:
- if (interrupt_request & CPU_INTERRUPT_TIMER) {
- idx = EXCP_CLK_INTERRUPT;
- }
- /* FALLTHRU */
- case 5:
- if (interrupt_request & CPU_INTERRUPT_SMP) {
- idx = EXCP_SMP_INTERRUPT;
- }
- /* FALLTHRU */
- case 6:
- if (interrupt_request & CPU_INTERRUPT_MCHK) {
- idx = EXCP_MCHK;
- }
- }
- if (idx >= 0) {
- cpu->exception_index = idx;
- env->error_code = 0;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
- }
#endif
/* The target hook has 3 exit conditions:
False when the interrupt isn't processed,
diff --git a/target-alpha/cpu-qom.h b/target-alpha/cpu-qom.h
index 0caa362..b01c6c8 100644
--- a/target-alpha/cpu-qom.h
+++ b/target-alpha/cpu-qom.h
@@ -79,6 +79,7 @@ extern const struct VMStateDescription vmstate_alpha_cpu;
#endif
void alpha_cpu_do_interrupt(CPUState *cpu);
+bool alpha_cpu_exec_interrupt(CPUState *cpu, int int_req);
void alpha_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
int flags);
hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c
index 2491f0a..a98b7d8 100644
--- a/target-alpha/cpu.c
+++ b/target-alpha/cpu.c
@@ -284,6 +284,7 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = alpha_cpu_class_by_name;
cc->has_work = alpha_cpu_has_work;
cc->do_interrupt = alpha_cpu_do_interrupt;
+ cc->cpu_exec_interrupt = alpha_cpu_exec_interrupt;
cc->dump_state = alpha_cpu_dump_state;
cc->set_pc = alpha_cpu_set_pc;
cc->gdb_read_register = alpha_cpu_gdb_read_register;
diff --git a/target-alpha/helper.c b/target-alpha/helper.c
index 7c053a3..a8aa782 100644
--- a/target-alpha/helper.c
+++ b/target-alpha/helper.c
@@ -470,6 +470,50 @@ void alpha_cpu_do_interrupt(CPUState *cs)
#endif /* !USER_ONLY */
}
+bool alpha_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
+{
+ AlphaCPU *cpu = ALPHA_CPU(cs);
+ CPUAlphaState *env = &cpu->env;
+ int idx = -1;
+
+ /* We never take interrupts while in PALmode. */
+ if (env->pal_mode) {
+ return false;
+ }
+
+ /* Fall through the switch, collecting the highest priority
+ interrupt that isn't masked by the processor status IPL. */
+ /* ??? This hard-codes the OSF/1 interrupt levels. */
+ switch (env->ps & PS_INT_MASK) {
+ case 0 ... 3:
+ if (interrupt_request & CPU_INTERRUPT_HARD) {
+ idx = EXCP_DEV_INTERRUPT;
+ }
+ /* FALLTHRU */
+ case 4:
+ if (interrupt_request & CPU_INTERRUPT_TIMER) {
+ idx = EXCP_CLK_INTERRUPT;
+ }
+ /* FALLTHRU */
+ case 5:
+ if (interrupt_request & CPU_INTERRUPT_SMP) {
+ idx = EXCP_SMP_INTERRUPT;
+ }
+ /* FALLTHRU */
+ case 6:
+ if (interrupt_request & CPU_INTERRUPT_MCHK) {
+ idx = EXCP_MCHK;
+ }
+ }
+ if (idx >= 0) {
+ cs->exception_index = idx;
+ env->error_code = 0;
+ alpha_cpu_do_interrupt(cs);
+ return true;
+ }
+ return false;
+}
+
void alpha_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
--
1.9.3
next prev parent reply other threads:[~2014-09-13 16:46 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-13 16:45 [Qemu-devel] [PATCH 00/23] qom hooks to clean up cpu_exec Richard Henderson
2014-09-13 16:45 ` [Qemu-devel] [PATCH 01/23] qom: Add cpu_exec_enter and cpu_exec_exit hooks Richard Henderson
2014-09-14 19:35 ` Alex Bennée
2014-09-17 11:54 ` Andreas Färber
2014-09-17 15:22 ` Richard Henderson
2014-09-25 18:03 ` Peter Maydell
2014-09-13 16:45 ` [Qemu-devel] [PATCH 02/23] cpu-exec: Remove do-nothing ifdef chains Richard Henderson
2014-09-14 19:36 ` Alex Bennée
2014-09-13 16:45 ` [Qemu-devel] [PATCH 03/23] target-i386: Use cpu_exec_enter/exit qom hooks Richard Henderson
2014-09-14 19:38 ` Alex Bennée
2014-09-13 16:45 ` [Qemu-devel] [PATCH 04/23] target-m68k: " Richard Henderson
2014-09-14 19:40 ` Alex Bennée
2014-09-13 16:45 ` [Qemu-devel] [PATCH 05/23] target-ppc: Use cpu_exec_enter qom hook Richard Henderson
2014-09-14 19:43 ` Alex Bennée
2014-09-15 1:16 ` Peter Maydell
2014-09-13 16:45 ` [Qemu-devel] [PATCH 06/23] qom: Add cpu_exec_interrupt hook Richard Henderson
2014-09-16 4:14 ` Max Filippov
2014-09-16 18:09 ` Alex Bennée
2014-09-13 16:45 ` [Qemu-devel] [PATCH 07/23] target-xtensa: Use cpu_exec_interrupt qom hook Richard Henderson
2014-09-16 4:13 ` Max Filippov
2014-09-16 18:18 ` Alex Bennée
2014-09-16 19:11 ` Richard Henderson
2014-09-13 16:45 ` [Qemu-devel] [PATCH 08/23] target-s390x: " Richard Henderson
2014-09-16 18:41 ` Alex Bennée
2014-09-13 16:45 ` [Qemu-devel] [PATCH 09/23] target-m68k: " Richard Henderson
2014-09-16 18:41 ` Alex Bennée
2014-09-13 16:45 ` [Qemu-devel] [PATCH 10/23] target-cris: " Richard Henderson
2014-09-16 10:35 ` Edgar E. Iglesias
2014-09-13 16:45 ` Richard Henderson [this message]
2014-09-13 16:45 ` [Qemu-devel] [PATCH 12/23] target-sh4: " Richard Henderson
2014-09-13 16:45 ` [Qemu-devel] [PATCH 13/23] target-unicore32: " Richard Henderson
2014-09-13 16:45 ` [Qemu-devel] [PATCH 14/23] target-arm: " Richard Henderson
2014-09-13 16:45 ` [Qemu-devel] [PATCH 15/23] target-sparc: " Richard Henderson
2014-09-13 16:45 ` [Qemu-devel] [PATCH 16/23] target-openrisc: " Richard Henderson
2014-09-16 3:59 ` Jia Liu
2014-09-13 16:45 ` [Qemu-devel] [PATCH 17/23] target-tricore: Remove the dummy interrupt boilerplate Richard Henderson
2014-09-21 7:36 ` Bastian Koppelmann
2014-09-13 16:45 ` [Qemu-devel] [PATCH 18/23] target-mips: Use cpu_exec_interrupt qom hook Richard Henderson
2014-09-15 11:09 ` Leon Alrae
2014-09-13 16:45 ` [Qemu-devel] [PATCH 19/23] target-microblaze: " Richard Henderson
2014-09-13 16:45 ` [Qemu-devel] [PATCH 20/23] target-lm32: " Richard Henderson
2014-09-14 18:35 ` Michael Walle
2014-09-13 16:45 ` [Qemu-devel] [PATCH 21/23] target-ppc: " Richard Henderson
2014-09-13 16:45 ` [Qemu-devel] [PATCH 22/23] target-i386: " Richard Henderson
2014-09-13 16:45 ` [Qemu-devel] [PATCH 23/23] cpu-exec: Do CPU_INTERRUPT_HALT unconditionally Richard Henderson
2014-09-26 10:45 ` [Qemu-devel] [PATCH 00/23] qom hooks to clean up cpu_exec Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1410626734-3804-12-git-send-email-rth@twiddle.net \
--to=rth@twiddle.net \
--cc=afaerber@suse.de \
--cc=aliguori@amazon.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).