From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47197) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XSqSH-0001Q6-6K for qemu-devel@nongnu.org; Sat, 13 Sep 2014 12:45:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XSqSC-0000ig-AN for qemu-devel@nongnu.org; Sat, 13 Sep 2014 12:45:45 -0400 Received: from mail-pd0-x236.google.com ([2607:f8b0:400e:c02::236]:47302) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XSqSC-0000iU-2g for qemu-devel@nongnu.org; Sat, 13 Sep 2014 12:45:40 -0400 Received: by mail-pd0-f182.google.com with SMTP id w10so3451873pde.41 for ; Sat, 13 Sep 2014 09:45:39 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Sat, 13 Sep 2014 09:45:12 -0700 Message-Id: <1410626734-3804-2-git-send-email-rth@twiddle.net> In-Reply-To: <1410626734-3804-1-git-send-email-rth@twiddle.net> References: <1410626734-3804-1-git-send-email-rth@twiddle.net> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH 01/23] qom: Add cpu_exec_enter and cpu_exec_exit hooks List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, afaerber@suse.de, aliguori@amazon.com In preparation for removing a bunch of ifdefs from cpu_exec. Cc: Andreas Färber Signed-off-by: Richard Henderson --- cpu-exec.c | 9 ++------- include/qom/cpu.h | 5 +++++ qom/cpu.c | 6 ++++-- 3 files changed, 11 insertions(+), 9 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index bd93165..d5b86d0 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -317,10 +317,7 @@ volatile sig_atomic_t exit_request; int cpu_exec(CPUArchState *env) { CPUState *cpu = ENV_GET_CPU(env); -#if !(defined(CONFIG_USER_ONLY) && \ - (defined(TARGET_M68K) || defined(TARGET_PPC) || defined(TARGET_S390X))) CPUClass *cc = CPU_GET_CLASS(cpu); -#endif #ifdef TARGET_I386 X86CPU *x86_cpu = X86_CPU(cpu); #endif @@ -382,9 +379,8 @@ int cpu_exec(CPUArchState *env) #elif defined(TARGET_XTENSA) #elif defined(TARGET_TRICORE) /* XXXXX */ -#else -#error unsupported target CPU #endif + cc->cpu_exec_enter(cpu); cpu->exception_index = -1; /* Calculate difference between guest clock and host clock. @@ -856,9 +852,8 @@ int cpu_exec(CPUArchState *env) #elif defined(TARGET_S390X) #elif defined(TARGET_XTENSA) /* XXXXX */ -#else -#error unsupported target CPU #endif + cc->cpu_exec_exit(cpu); /* fail safe : never use current_cpu outside cpu_exec() */ current_cpu = NULL; diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 370b3eb..0340cf4 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -99,6 +99,8 @@ struct TranslationBlock; * @vmsd: State description for migration. * @gdb_num_core_regs: Number of core registers accessible to GDB. * @gdb_core_xml_file: File name for core registers GDB XML description. + * @cpu_exec_enter: Callback for cpu_exec preparation. + * @cpu_exec_exit: Callback for cpu_exec cleanup. * * Represents a CPU family or model. */ @@ -149,6 +151,9 @@ typedef struct CPUClass { const struct VMStateDescription *vmsd; int gdb_num_core_regs; const char *gdb_core_xml_file; + + void (*cpu_exec_enter)(CPUState *cpu); + void (*cpu_exec_exit)(CPUState *cpu); } CPUClass; #ifdef HOST_WORDS_BIGENDIAN diff --git a/qom/cpu.c b/qom/cpu.c index ba8b402..6a9d02e 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -202,7 +202,7 @@ static bool cpu_common_virtio_is_big_endian(CPUState *cpu) return target_words_bigendian(); } -static void cpu_common_debug_excp_handler(CPUState *cpu) +static void cpu_common_noop(CPUState *cpu) { } @@ -344,7 +344,9 @@ static void cpu_class_init(ObjectClass *klass, void *data) k->gdb_read_register = cpu_common_gdb_read_register; k->gdb_write_register = cpu_common_gdb_write_register; k->virtio_is_big_endian = cpu_common_virtio_is_big_endian; - k->debug_excp_handler = cpu_common_debug_excp_handler; + k->debug_excp_handler = cpu_common_noop; + k->cpu_exec_enter = cpu_common_noop; + k->cpu_exec_exit = cpu_common_noop; dc->realize = cpu_common_realizefn; /* * Reason: CPUs still need special care by board code: wiring up -- 1.9.3