From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46441) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XXVCG-0007Be-Hr for qemu-devel@nongnu.org; Fri, 26 Sep 2014 09:04:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XXVC9-00071d-Ev for qemu-devel@nongnu.org; Fri, 26 Sep 2014 09:04:28 -0400 Received: from mail-lb0-x229.google.com ([2a00:1450:4010:c04::229]:61220) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XXVC9-00070r-6r for qemu-devel@nongnu.org; Fri, 26 Sep 2014 09:04:21 -0400 Received: by mail-lb0-f169.google.com with SMTP id u10so1023453lbd.14 for ; Fri, 26 Sep 2014 06:04:15 -0700 (PDT) From: hw.claudio@gmail.com Date: Fri, 26 Sep 2014 15:09:20 +0200 Message-Id: <1411736960-24206-1-git-send-email-hw.claudio@gmail.com> Subject: [Qemu-devel] [PATCH] hw/arm/virt: mark timer in fdt as v8-compatible List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Claudio Fontana , qemu-devel@nongnu.org From: Claudio Fontana check if the first cpu is an armv8 cpu, and if so, put arm,armv8-timer in the compatible string list. Note that due to this check, this patch moves the creation of the timer fdt node to after the cpu creation loop. Signed-off-by: Claudio Fontana --- hw/arm/virt.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 8c6b171..eeb3105 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -239,14 +239,23 @@ static void fdt_add_timer_nodes(const VirtBoardInfo *vbi) * but for the GIC implementation provided by both QEMU and KVM * they are edge-triggered. */ + ARMCPU *armcpu; uint32_t irqflags = GIC_FDT_IRQ_FLAGS_EDGE_LO_HI; irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START, GIC_FDT_IRQ_PPI_CPU_WIDTH, (1 << vbi->smp_cpus) - 1); qemu_fdt_add_subnode(vbi->fdt, "/timer"); - qemu_fdt_setprop_string(vbi->fdt, "/timer", - "compatible", "arm,armv7-timer"); + + armcpu = ARM_CPU(qemu_get_cpu(0)); + if (arm_feature(&armcpu->env, ARM_FEATURE_V8)) { + const char compat[] = "arm,armv7-timer\0arm,armv8-timer"; + qemu_fdt_setprop(vbi->fdt, "/timer", "compatible", + compat, sizeof(compat)); + } else { + qemu_fdt_setprop_string(vbi->fdt, "/timer", "compatible", + "arm,armv7-timer"); + } qemu_fdt_setprop_cells(vbi->fdt, "/timer", "interrupts", GIC_FDT_IRQ_TYPE_PPI, 13, irqflags, GIC_FDT_IRQ_TYPE_PPI, 14, irqflags, @@ -553,7 +562,6 @@ static void machvirt_init(MachineState *machine) } create_fdt(vbi); - fdt_add_timer_nodes(vbi); for (n = 0; n < smp_cpus; n++) { ObjectClass *oc = cpu_class_by_name(TYPE_ARM_CPU, cpu_model); @@ -577,6 +585,7 @@ static void machvirt_init(MachineState *machine) object_property_set_bool(cpuobj, true, "realized", NULL); } + fdt_add_timer_nodes(vbi); fdt_add_cpu_nodes(vbi); fdt_add_psci_node(vbi); -- 1.8.5.3