From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50452) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XYtFt-0001so-IR for qemu-devel@nongnu.org; Tue, 30 Sep 2014 04:58:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XYtFl-00071C-EP for qemu-devel@nongnu.org; Tue, 30 Sep 2014 04:57:57 -0400 Received: from e06smtp14.uk.ibm.com ([195.75.94.110]:55965) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XYtFl-0006zf-5D for qemu-devel@nongnu.org; Tue, 30 Sep 2014 04:57:49 -0400 Received: from /spool/local by e06smtp14.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 30 Sep 2014 09:57:43 +0100 Received: from b06cxnps4075.portsmouth.uk.ibm.com (d06relay12.portsmouth.uk.ibm.com [9.149.109.197]) by d06dlp01.portsmouth.uk.ibm.com (Postfix) with ESMTP id CC22E17D8045 for ; Tue, 30 Sep 2014 09:59:51 +0100 (BST) Received: from d06av11.portsmouth.uk.ibm.com (d06av11.portsmouth.uk.ibm.com [9.149.37.252]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id s8U8vgOk58785924 for ; Tue, 30 Sep 2014 08:57:42 GMT Received: from d06av11.portsmouth.uk.ibm.com (localhost [127.0.0.1]) by d06av11.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id s8U8vf6A021635 for ; Tue, 30 Sep 2014 02:57:41 -0600 From: Jens Freimann Date: Tue, 30 Sep 2014 10:57:32 +0200 Message-Id: <1412067452-32960-7-git-send-email-jfrei@linux.vnet.ibm.com> In-Reply-To: <1412067452-32960-1-git-send-email-jfrei@linux.vnet.ibm.com> References: <1412067452-32960-1-git-send-email-jfrei@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH 6/6] s390x/kvm: synchronize the cpu state after SIGP (INITIAL) CPU RESET List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Christian Borntraeger , Alexander Graf , Cornelia Huck Cc: David Hildenbrand , Jens Freimann , Andreas Faerber , qemu-devel@nongnu.org From: David Hildenbrand We need to synchronize registers after a reset has been performed. The current code does that in qemu_system_reset(), load_normal_reset() and modified_clear_reset() for all vcpus. After SIGP (INITIAL) CPU RESET, this needs to be done for the targeted vcpu as well, so let's call cpu_synchronize_post_reset() in the respective handlers. Signed-off-by: David Hildenbrand Signed-off-by: Jens Freimann Reviewed-by: Cornelia Huck CC: Andreas Faerber --- target-s390x/kvm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c index e4c4c8d..5b10a25 100644 --- a/target-s390x/kvm.c +++ b/target-s390x/kvm.c @@ -952,6 +952,7 @@ static void sigp_initial_cpu_reset(void *arg) cpu_synchronize_state(cpu); scc->initial_cpu_reset(cpu); + cpu_synchronize_post_reset(cpu); } static void sigp_cpu_reset(void *arg) @@ -961,6 +962,7 @@ static void sigp_cpu_reset(void *arg) cpu_synchronize_state(cpu); scc->cpu_reset(cpu); + cpu_synchronize_post_reset(cpu); } #define SIGP_ORDER_MASK 0x000000ff -- 1.8.5.5