From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35108) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XZFOL-0001Sa-Br for qemu-devel@nongnu.org; Wed, 01 Oct 2014 04:36:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XZFOG-0007VY-8a for qemu-devel@nongnu.org; Wed, 01 Oct 2014 04:36:09 -0400 Received: from mail.uni-paderborn.de ([131.234.142.9]:54157) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XZFOG-0007VL-2v for qemu-devel@nongnu.org; Wed, 01 Oct 2014 04:36:04 -0400 From: Bastian Koppelmann Date: Wed, 1 Oct 2014 10:35:34 +0100 Message-Id: <1412156136-28899-4-git-send-email-kbastian@mail.uni-paderborn.de> In-Reply-To: <1412156136-28899-1-git-send-email-kbastian@mail.uni-paderborn.de> References: <1412156136-28899-1-git-send-email-kbastian@mail.uni-paderborn.de> Subject: [Qemu-devel] [PATCH v2 3/5] target-tricore: Add instructions of B opcode format List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, rth@twiddle.net Add instructions of B opcode format. Signed-off-by: Bastian Koppelmann Reviewed-by: Richard Henderson --- target-tricore/translate.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/target-tricore/translate.c b/target-tricore/translate.c index fc89a43..830bcd0 100644 --- a/target-tricore/translate.c +++ b/target-tricore/translate.c @@ -116,6 +116,8 @@ void tricore_cpu_dump_state(CPUState *cs, FILE *f, } while (0) #define EA_ABS_FORMAT(con) (((con & 0x3C000) << 14) + (con & 0x3FFF)) +#define EA_B_ABSOLUT(con) (((offset & 0xf00000) << 8) | \ + ((offset & 0x0fffff) << 1)) /* Functions for load/save to/from memory */ @@ -492,6 +494,7 @@ static void gen_compute_branch(DisasContext *ctx, uint32_t opc, int r1, case OPC1_32_B_J: gen_goto_tb(ctx, 0, ctx->pc + offset * 2); break; + case OPC1_32_B_CALL: case OPC1_16_SB_CALL: gen_helper_1arg(call, ctx->next_pc); gen_goto_tb(ctx, 0, ctx->pc + offset * 2); @@ -567,6 +570,20 @@ static void gen_compute_branch(DisasContext *ctx, uint32_t opc, int r1, gen_helper_ret(cpu_env); tcg_gen_exit_tb(0); break; +/* B-format */ + case OPC1_32_B_CALLA: + gen_helper_1arg(call, ctx->next_pc); + gen_goto_tb(ctx, 0, EA_B_ABSOLUT(offset)); + break; + case OPC1_32_B_JLA: + tcg_gen_movi_tl(cpu_gpr_a[11], ctx->next_pc); + case OPC1_32_B_JA: + gen_goto_tb(ctx, 0, EA_B_ABSOLUT(offset)); + break; + case OPC1_32_B_JL: + tcg_gen_movi_tl(cpu_gpr_a[11], ctx->next_pc); + gen_goto_tb(ctx, 0, ctx->pc + offset * 2); + break; default: printf("Branch Error at %x\n", ctx->pc); } @@ -1403,6 +1420,16 @@ static void decode_32Bit_opc(CPUTriCoreState *env, DisasContext *ctx) tcg_temp_free(temp); tcg_temp_free(temp2); break; +/* B-format */ + case OPC1_32_B_CALL: + case OPC1_32_B_CALLA: + case OPC1_32_B_J: + case OPC1_32_B_JA: + case OPC1_32_B_JL: + case OPC1_32_B_JLA: + address = MASK_OP_B_DISP24(ctx->opcode); + gen_compute_branch(ctx, op1, 0, 0, 0, address); + break; } } -- 2.1.1