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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 03/23] hw/arm/boot: register cpu reset handlers if using -bios
Date: Fri, 24 Oct 2014 12:37:09 +0100	[thread overview]
Message-ID: <1414150649-30428-4-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1414150649-30428-1-git-send-email-peter.maydell@linaro.org>

From: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Move the registering of CPU reset handlers to before the point where
we leave the function in the -bios (not -kernel) case, so CPU reset
works correctly with -bios as well.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/boot.c | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index c8dc34f..bffbea5 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -478,7 +478,7 @@ static void do_cpu_reset(void *opaque)
 
 void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
 {
-    CPUState *cs = CPU(cpu);
+    CPUState *cs;
     int kernel_size;
     int initrd_size;
     int is_linux = 0;
@@ -488,6 +488,15 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
     int big_endian;
     static const ARMInsnFixup *primary_loader;
 
+    /* CPU objects (unlike devices) are not automatically reset on system
+     * reset, so we must always register a handler to do so. If we're
+     * actually loading a kernel, the handler is also responsible for
+     * arranging that we start it correctly.
+     */
+    for (cs = CPU(cpu); cs; cs = CPU_NEXT(cs)) {
+        qemu_register_reset(do_cpu_reset, ARM_CPU(cs));
+    }
+
     /* Load the kernel.  */
     if (!info->kernel_filename) {
 
@@ -652,9 +661,7 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
     }
     info->is_linux = is_linux;
 
-    for (; cs; cs = CPU_NEXT(cs)) {
-        cpu = ARM_CPU(cs);
-        cpu->env.boot_info = info;
-        qemu_register_reset(do_cpu_reset, cpu);
+    for (cs = CPU(cpu); cs; cs = CPU_NEXT(cs)) {
+        ARM_CPU(cs)->env.boot_info = info;
     }
 }
-- 
1.9.1

  parent reply	other threads:[~2014-10-24 11:37 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-24 11:37 [Qemu-devel] [PULL 00/23] target-arm queue Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 01/23] hmp: Remove "info pcmcia" Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 02/23] hw/arm/virt: mark timer in fdt as v8-compatible Peter Maydell
2014-10-24 11:37 ` Peter Maydell [this message]
2014-10-24 11:37 ` [Qemu-devel] [PULL 04/23] disas/libvixl: Update to libvixl 1.6 Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 05/23] arm_gic: remove unused parameter Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 06/23] disas/libvixl/a64/instructions-a64.h: Remove unused constants Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 07/23] omap_gpmc.c: Remove duplicate assignment Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 08/23] target-arm: add powered off cpu state Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 09/23] target-arm: do not set do_interrupt handlers for ARM and AArch64 user modes Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 10/23] target-arm: add missing PSCI constants needed for PSCI emulation Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 11/23] target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpers Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 12/23] target-arm: Add support for A32 and T32 HVC and SMC insns Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 13/23] target-arm: add emulation of PSCI calls for system emulation Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 14/23] arm/virt: enable PSCI emulation support " Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 15/23] target-arm: Correct sense of the DCZID DZP bit Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 16/23] target-arm: Report a valid L1Ip field in CTR_EL0 for CPU type "any" Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 17/23] target-arm: correctly UNDEF writes to FPINST/FPINST2 from EL0 Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 18/23] target-arm: increase arrays of registers R13 & R14 Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 19/23] target-arm: add arm_is_secure() function Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 20/23] target-arm: reject switching to monitor mode Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 21/23] target-arm: rename arm_current_pl to arm_current_el Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 22/23] target-arm: make arm_current_el() return EL3 Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 23/23] target-arm: A32: Emulate the SMC instruction Peter Maydell
2014-10-24 12:56 ` [Qemu-devel] [PULL 00/23] target-arm queue Peter Maydell

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