From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50508) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XhdBf-0006ct-K2 for qemu-devel@nongnu.org; Fri, 24 Oct 2014 07:37:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XhdBe-0008UC-H8 for qemu-devel@nongnu.org; Fri, 24 Oct 2014 07:37:43 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:54280) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XhdBe-0008OE-9u for qemu-devel@nongnu.org; Fri, 24 Oct 2014 07:37:42 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1XhdBR-0007vd-Np for qemu-devel@nongnu.org; Fri, 24 Oct 2014 12:37:29 +0100 From: Peter Maydell Date: Fri, 24 Oct 2014 12:37:11 +0100 Message-Id: <1414150649-30428-6-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1414150649-30428-1-git-send-email-peter.maydell@linaro.org> References: <1414150649-30428-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 05/23] arm_gic: remove unused parameter. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: KONRAD Frederic This removes num_irq parameter from gic_init_irqs_and_distributor as it is not used. Signed-off-by: KONRAD Frederic Message-id: 1412859651-15060-1-git-send-email-fred.konrad@greensocs.com Signed-off-by: Peter Maydell --- hw/intc/arm_gic.c | 4 ++-- hw/intc/armv7m_nvic.c | 2 +- hw/intc/gic_internal.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index db9110c..270ce05 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -769,7 +769,7 @@ static const MemoryRegionOps gic_cpu_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -void gic_init_irqs_and_distributor(GICState *s, int num_irq) +void gic_init_irqs_and_distributor(GICState *s) { SysBusDevice *sbd = SYS_BUS_DEVICE(s); int i; @@ -808,7 +808,7 @@ static void arm_gic_realize(DeviceState *dev, Error **errp) return; } - gic_init_irqs_and_distributor(s, s->num_irq); + gic_init_irqs_and_distributor(s); /* Memory regions for the CPU interfaces (NVIC doesn't have these): * a region for "CPU interface for this core", then a region for diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 1a7af45..d0543d4 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -488,7 +488,7 @@ static void armv7m_nvic_realize(DeviceState *dev, Error **errp) error_propagate(errp, local_err); return; } - gic_init_irqs_and_distributor(&s->gic, s->num_irq); + gic_init_irqs_and_distributor(&s->gic); /* The NVIC and system controller register area looks like this: * 0..0xff : system control registers, including systick * 0x100..0xcff : GIC-like registers diff --git a/hw/intc/gic_internal.h b/hw/intc/gic_internal.h index 48a58d7..e87ef36 100644 --- a/hw/intc/gic_internal.h +++ b/hw/intc/gic_internal.h @@ -59,7 +59,7 @@ void gic_set_pending_private(GICState *s, int cpu, int irq); uint32_t gic_acknowledge_irq(GICState *s, int cpu); void gic_complete_irq(GICState *s, int cpu, int irq); void gic_update(GICState *s); -void gic_init_irqs_and_distributor(GICState *s, int num_irq); +void gic_init_irqs_and_distributor(GICState *s); void gic_set_priority(GICState *s, int cpu, int irq, uint8_t val); static inline bool gic_test_pending(GICState *s, int irq, int cm) -- 1.9.1