From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 08/23] target-arm: add powered off cpu state
Date: Fri, 24 Oct 2014 12:37:14 +0100 [thread overview]
Message-ID: <1414150649-30428-9-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1414150649-30428-1-git-send-email-peter.maydell@linaro.org>
From: Rob Herring <rob.herring@linaro.org>
Add tracking of cpu power state in order to support powering off of
cores in system emuluation. The initial state is determined by the
start-powered-off QOM property.
Signed-off-by: Rob Herring <rob.herring@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1412865028-17725-2-git-send-email-peter.maydell@linaro.org
---
target-arm/cpu-qom.h | 2 ++
target-arm/cpu.c | 8 +++++++-
target-arm/machine.c | 5 +++--
3 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index 96a3da9..aeb7e1d 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -98,6 +98,8 @@ typedef struct ARMCPU {
/* Should CPU start in PSCI powered-off state? */
bool start_powered_off;
+ /* CPU currently in PSCI powered-off state */
+ bool powered_off;
/* [QEMU_]KVM_ARM_TARGET_* constant for this CPU, or
* QEMU_KVM_ARM_TARGET_NONE if the kernel doesn't support this CPU type.
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index edfd586..67cd176 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -40,7 +40,10 @@ static void arm_cpu_set_pc(CPUState *cs, vaddr value)
static bool arm_cpu_has_work(CPUState *cs)
{
- return cs->interrupt_request &
+ ARMCPU *cpu = ARM_CPU(cs);
+
+ return !cpu->powered_off
+ && cs->interrupt_request &
(CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD
| CPU_INTERRUPT_VFIQ | CPU_INTERRUPT_VIRQ
| CPU_INTERRUPT_EXITTB);
@@ -93,6 +96,9 @@ static void arm_cpu_reset(CPUState *s)
env->vfp.xregs[ARM_VFP_MVFR1] = cpu->mvfr1;
env->vfp.xregs[ARM_VFP_MVFR2] = cpu->mvfr2;
+ cpu->powered_off = cpu->start_powered_off;
+ s->halted = cpu->start_powered_off;
+
if (arm_feature(env, ARM_FEATURE_IWMMXT)) {
env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q';
}
diff --git a/target-arm/machine.c b/target-arm/machine.c
index ddb7d05..5776ee0 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -222,8 +222,8 @@ static int cpu_post_load(void *opaque, int version_id)
const VMStateDescription vmstate_arm_cpu = {
.name = "cpu",
- .version_id = 20,
- .minimum_version_id = 20,
+ .version_id = 21,
+ .minimum_version_id = 21,
.pre_save = cpu_pre_save,
.post_load = cpu_post_load,
.fields = (VMStateField[]) {
@@ -263,6 +263,7 @@ const VMStateDescription vmstate_arm_cpu = {
VMSTATE_UINT64(env.exception.vaddress, ARMCPU),
VMSTATE_TIMER(gt_timer[GTIMER_PHYS], ARMCPU),
VMSTATE_TIMER(gt_timer[GTIMER_VIRT], ARMCPU),
+ VMSTATE_BOOL(powered_off, ARMCPU),
VMSTATE_END_OF_LIST()
},
.subsections = (VMStateSubsection[]) {
--
1.9.1
next prev parent reply other threads:[~2014-10-24 11:37 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-24 11:37 [Qemu-devel] [PULL 00/23] target-arm queue Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 01/23] hmp: Remove "info pcmcia" Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 02/23] hw/arm/virt: mark timer in fdt as v8-compatible Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 03/23] hw/arm/boot: register cpu reset handlers if using -bios Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 04/23] disas/libvixl: Update to libvixl 1.6 Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 05/23] arm_gic: remove unused parameter Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 06/23] disas/libvixl/a64/instructions-a64.h: Remove unused constants Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 07/23] omap_gpmc.c: Remove duplicate assignment Peter Maydell
2014-10-24 11:37 ` Peter Maydell [this message]
2014-10-24 11:37 ` [Qemu-devel] [PULL 09/23] target-arm: do not set do_interrupt handlers for ARM and AArch64 user modes Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 10/23] target-arm: add missing PSCI constants needed for PSCI emulation Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 11/23] target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpers Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 12/23] target-arm: Add support for A32 and T32 HVC and SMC insns Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 13/23] target-arm: add emulation of PSCI calls for system emulation Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 14/23] arm/virt: enable PSCI emulation support " Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 15/23] target-arm: Correct sense of the DCZID DZP bit Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 16/23] target-arm: Report a valid L1Ip field in CTR_EL0 for CPU type "any" Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 17/23] target-arm: correctly UNDEF writes to FPINST/FPINST2 from EL0 Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 18/23] target-arm: increase arrays of registers R13 & R14 Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 19/23] target-arm: add arm_is_secure() function Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 20/23] target-arm: reject switching to monitor mode Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 21/23] target-arm: rename arm_current_pl to arm_current_el Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 22/23] target-arm: make arm_current_el() return EL3 Peter Maydell
2014-10-24 11:37 ` [Qemu-devel] [PULL 23/23] target-arm: A32: Emulate the SMC instruction Peter Maydell
2014-10-24 12:56 ` [Qemu-devel] [PULL 00/23] target-arm queue Peter Maydell
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