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* [Qemu-devel] [PATCH v8 00/27] target-arm: add Security Extensions for CPUs
@ 2014-10-30 21:28 Greg Bellows
  2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 01/27] target-arm: extend async excp masking Greg Bellows
                   ` (26 more replies)
  0 siblings, 27 replies; 81+ messages in thread
From: Greg Bellows @ 2014-10-30 21:28 UTC (permalink / raw)
  To: qemu-devel, peter.maydell, serge.fdrv, edgar.iglesias, aggelerf
  Cc: greg.bellows

Version 8 of the ARM processor security extension (TrustZone) support.  This
patchset includes changes to support the processor security extensions
on ARMv7 aarch32 with hooks for later enabling v8 aarch64/32.

Patches 1-6 of version 7 have already been accepted and committed.

Summary of changes from v7 -> v8:
- Reworked exception maskign and target EL functions to use table lookups
  instead of extensive conditionals.
- Moved and renamed use_secure_reg to access_secure_reg
- Redo fieldoffset definitions to eliminate #defines
- Consolidated common secure v7/v8 CP regs
- Removed NSACR read/write functions
- Fixed SDER and added SDER32_EL3
- Made MVBAR a 32-bit field
- Fixed CPSR write logic
- Fixed various code and commit comments
- Fixed CSSELR CP definition to use OPC0

Fabian Aggeler (20):
  target-arm: add banked register accessors
  target-arm: add CPREG secure state support
  target-arm: insert AArch32 cpregs twice into hashtable
  target-arm: move AArch32 SCR into security reglist
  target-arm: implement IRQ/FIQ routing to Monitor mode
  target-arm: add NSACR register
  target-arm: add MVBAR support
  target-arm: add SCTLR_EL3 and make SCTLR banked
  target-arm: respect SCR.FW, SCR.AW and SCTLR.NMFI
  target-arm: make CSSELR banked
  target-arm: add TTBR0_EL3 and make TTBR0/1 banked
  target-arm: add TCR_EL3 and make TTBCR banked
  target-arm: make c2_mask and c2_base_mask banked
  target-arm: make DACR banked
  target-arm: make IFSR banked
  target-arm: make DFSR banked
  target-arm: make IFAR/DFAR banked
  target-arm: make PAR banked
  target-arm: make c13 cp regs banked (FCSEIDR, ...)
  target-arm: add cpu feature EL3 to CPUs with Security Extensions

Greg Bellows (5):
  target-arm: extend async excp masking
  target-arm: add async excp target_el function
  target-arm: add secure state bit to CPREG hash
  target-arm: make VBAR banked
  target-arm: make MAIR0/1 banked

Sergey Fedorov (2):
  target-arm: add non-secure Translation Block flag
  target-arm: add SDER definition

 hw/arm/pxa2xx.c                 |   8 +-
 linux-user/aarch64/target_cpu.h |   2 +-
 linux-user/arm/target_cpu.h     |   2 +-
 linux-user/main.c               |  72 ++---
 target-arm/cpu.c                |  11 +-
 target-arm/cpu.h                | 525 ++++++++++++++++++++++++++++----
 target-arm/helper.c             | 655 +++++++++++++++++++++++++++++-----------
 target-arm/internals.h          |   2 +-
 target-arm/op_helper.c          |   4 +-
 target-arm/translate.c          |  17 +-
 target-arm/translate.h          |   1 +
 11 files changed, 1015 insertions(+), 284 deletions(-)

--
1.8.3.2

^ permalink raw reply	[flat|nested] 81+ messages in thread

end of thread, other threads:[~2014-11-05 22:19 UTC | newest]

Thread overview: 81+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-10-30 21:28 [Qemu-devel] [PATCH v8 00/27] target-arm: add Security Extensions for CPUs Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 01/27] target-arm: extend async excp masking Greg Bellows
2014-10-31 19:00   ` Peter Maydell
2014-11-05 21:12     ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 02/27] target-arm: add async excp target_el function Greg Bellows
2014-10-31 11:56   ` Peter Maydell
2014-10-31 14:14     ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 03/27] target-arm: add banked register accessors Greg Bellows
2014-10-31 16:50   ` Peter Maydell
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 04/27] target-arm: add non-secure Translation Block flag Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 05/27] target-arm: add CPREG secure state support Greg Bellows
2014-10-31 12:15   ` Peter Maydell
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 06/27] target-arm: add secure state bit to CPREG hash Greg Bellows
2014-10-31 12:28   ` Peter Maydell
2014-10-31 12:31     ` Peter Maydell
2014-10-31 16:20       ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 07/27] target-arm: insert AArch32 cpregs twice into hashtable Greg Bellows
2014-10-31 12:44   ` Peter Maydell
2014-10-31 19:01     ` Greg Bellows
2014-11-04 22:20       ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 08/27] target-arm: move AArch32 SCR into security reglist Greg Bellows
2014-10-31 12:06   ` Peter Maydell
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 09/27] target-arm: implement IRQ/FIQ routing to Monitor mode Greg Bellows
2014-10-31 12:01   ` Peter Maydell
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 10/27] target-arm: add NSACR register Greg Bellows
2014-10-31 13:24   ` Peter Maydell
2014-10-31 21:09     ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 11/27] target-arm: add SDER definition Greg Bellows
2014-10-31 13:30   ` Peter Maydell
2014-10-31 21:17     ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 12/27] target-arm: add MVBAR support Greg Bellows
2014-10-31 13:35   ` Peter Maydell
2014-10-31 21:19     ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 13/27] target-arm: add SCTLR_EL3 and make SCTLR banked Greg Bellows
2014-10-31 14:07   ` Peter Maydell
2014-10-31 21:51     ` Greg Bellows
2014-10-31 23:26       ` Peter Maydell
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 14/27] target-arm: respect SCR.FW, SCR.AW and SCTLR.NMFI Greg Bellows
2014-10-31 14:18   ` Peter Maydell
2014-11-03 14:57     ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 15/27] target-arm: make CSSELR banked Greg Bellows
2014-10-31 14:23   ` Peter Maydell
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 16/27] target-arm: add TTBR0_EL3 and make TTBR0/1 banked Greg Bellows
2014-10-31 15:04   ` Peter Maydell
2014-11-04 22:44     ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 17/27] target-arm: add TCR_EL3 and make TTBCR banked Greg Bellows
2014-10-31 15:07   ` Peter Maydell
2014-11-04 22:45     ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 18/27] target-arm: make c2_mask and c2_base_mask banked Greg Bellows
2014-10-31 15:26   ` Peter Maydell
2014-11-04 22:46     ` Greg Bellows
2014-11-04 23:27       ` Peter Maydell
2014-11-05 15:09         ` Greg Bellows
2014-11-05 15:15           ` Peter Maydell
2014-11-05 15:18             ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 19/27] target-arm: make DACR banked Greg Bellows
2014-10-31 15:38   ` Peter Maydell
2014-11-03 21:23     ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 20/27] target-arm: make IFSR banked Greg Bellows
2014-10-31 16:18   ` Peter Maydell
2014-11-05 22:19     ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 21/27] target-arm: make DFSR banked Greg Bellows
2014-10-31 16:19   ` Peter Maydell
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 22/27] target-arm: make IFAR/DFAR banked Greg Bellows
2014-10-31 16:24   ` Peter Maydell
2014-11-03 22:59     ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 23/27] target-arm: make PAR banked Greg Bellows
2014-10-31 17:21   ` Peter Maydell
2014-11-03 22:58     ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 24/27] target-arm: make VBAR banked Greg Bellows
2014-10-31 17:22   ` Peter Maydell
2014-11-03 22:06     ` Greg Bellows
2014-11-03 22:49       ` Peter Maydell
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 25/27] target-arm: make c13 cp regs banked (FCSEIDR, ...) Greg Bellows
2014-10-31 17:27   ` Peter Maydell
2014-11-03 22:57     ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 26/27] target-arm: make MAIR0/1 banked Greg Bellows
2014-10-31 17:31   ` Peter Maydell
2014-11-03 23:00     ` Greg Bellows
2014-11-04 14:13       ` Greg Bellows
2014-10-30 21:28 ` [Qemu-devel] [PATCH v8 27/27] target-arm: add cpu feature EL3 to CPUs with Security Extensions Greg Bellows

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