From: Greg Bellows <greg.bellows@linaro.org>
To: qemu-devel@nongnu.org, peter.maydell@linaro.org,
serge.fdrv@gmail.com, edgar.iglesias@gmail.com, aggelerf@ethz.ch,
christoffer.dall@linaro.org
Cc: daniel.thompson@linaro.org, Greg Bellows <greg.bellows@linaro.org>
Subject: [Qemu-devel] [PATCH v2 03/16] hw/arm/virt.c: Wire FIQ between CPU <> GIC
Date: Thu, 30 Oct 2014 17:11:59 -0500 [thread overview]
Message-ID: <1414707132-24588-4-git-send-email-greg.bellows@linaro.org> (raw)
In-Reply-To: <1414707132-24588-1-git-send-email-greg.bellows@linaro.org>
Connect FIQ output of the GIC CPU interfaces to the CPUs.
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
---
hw/arm/virt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 78f618d..e8bc059 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -354,6 +354,8 @@ static void create_gic(const VirtBoardInfo *vbi, qemu_irq *pic)
qdev_get_gpio_in(gicdev, ppibase + 27));
sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
+ sysbus_connect_irq(gicbusdev, i+smp_cpus, qdev_get_gpio_in(cpudev,
+ ARM_CPU_FIQ));
}
for (i = 0; i < NUM_IRQS; i++) {
--
1.8.3.2
next prev parent reply other threads:[~2014-10-31 15:26 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-30 22:11 [Qemu-devel] [PATCH v2 00/16] target-arm: Add GICv1/SecExt and GICv2/Grouping Greg Bellows
2014-10-30 22:11 ` [Qemu-devel] [PATCH v2 01/16] hw/intc/arm_gic: Request FIQ sources Greg Bellows
2015-04-14 18:46 ` Peter Maydell
2014-10-30 22:11 ` [Qemu-devel] [PATCH v2 02/16] hw/arm/vexpress.c: Wire FIQ between CPU <> GIC Greg Bellows
2015-04-14 18:48 ` Peter Maydell
2014-10-30 22:11 ` Greg Bellows [this message]
2014-10-30 22:12 ` [Qemu-devel] [PATCH v2 04/16] hw/intc/arm_gic: Add Security Extensions property Greg Bellows
2015-04-14 18:51 ` Peter Maydell
2014-10-30 22:12 ` [Qemu-devel] [PATCH v2 05/16] hw/intc/arm_gic: Add ns_access() function Greg Bellows
2015-04-14 18:53 ` Peter Maydell
2014-10-30 22:12 ` [Qemu-devel] [PATCH v2 06/16] hw/intc/arm_gic: Add Interrupt Group Registers Greg Bellows
2015-04-14 19:13 ` Peter Maydell
2015-04-17 17:33 ` Peter Maydell
2014-10-30 22:12 ` [Qemu-devel] [PATCH v2 07/16] hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked Greg Bellows
2014-11-04 14:46 ` Daniel Thompson
2014-11-04 18:35 ` Greg Bellows
2015-04-14 19:18 ` Peter Maydell
2014-10-30 22:12 ` [Qemu-devel] [PATCH v2 08/16] hw/intc/arm_gic: Make ICCICR/GICC_CTLR banked Greg Bellows
2015-04-14 19:22 ` Peter Maydell
2014-10-30 22:12 ` [Qemu-devel] [PATCH v2 09/16] hw/intc/arm_gic: Make ICCBPR/GICC_BPR banked Greg Bellows
2015-04-14 19:23 ` Peter Maydell
2014-10-30 22:12 ` [Qemu-devel] [PATCH v2 10/16] hw/intc/arm_gic: Implement Non-secure view of RPR Greg Bellows
2015-04-14 19:24 ` Peter Maydell
2014-10-30 22:12 ` [Qemu-devel] [PATCH v2 11/16] hw/intc/arm_gic: Handle grouping for GICC_HPPIR Greg Bellows
2015-04-14 19:25 ` Peter Maydell
2014-10-30 22:12 ` [Qemu-devel] [PATCH v2 12/16] hw/intc/arm_gic: Change behavior of EOIR writes Greg Bellows
2015-04-14 19:30 ` Peter Maydell
2014-10-30 22:12 ` [Qemu-devel] [PATCH v2 13/16] hw/intc/arm_gic: Change behavior of IAR writes Greg Bellows
2015-04-14 19:31 ` Peter Maydell
2014-10-30 22:12 ` [Qemu-devel] [PATCH v2 14/16] hw/intc/arm_gic: Restrict priority view Greg Bellows
2015-04-14 19:32 ` Peter Maydell
2014-10-30 22:12 ` [Qemu-devel] [PATCH v2 15/16] hw/intc/arm_gic: Break out gic_update() function Greg Bellows
2015-04-14 19:36 ` Peter Maydell
2014-10-30 22:12 ` [Qemu-devel] [PATCH v2 16/16] hw/intc/arm_gic: add gic_update() for grouping Greg Bellows
2014-11-07 12:44 ` Daniel Thompson
2014-11-10 14:43 ` Greg Bellows
2014-11-10 16:13 ` Christoffer Dall
2015-04-14 19:39 ` Peter Maydell
2015-04-14 19:18 ` [Qemu-devel] [PATCH v2 00/16] target-arm: Add GICv1/SecExt and GICv2/Grouping Peter Maydell
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