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From: Leon Alrae <leon.alrae@imgtec.com>
To: qemu-devel@nongnu.org
Cc: Yongbok Kim <yongbok.kim@imgtec.com>
Subject: [Qemu-devel] [PULL 18/34] target-mips: remove duplicated mips/ieee mapping function
Date: Mon, 3 Nov 2014 16:11:32 +0000	[thread overview]
Message-ID: <1415031108-15039-19-git-send-email-leon.alrae@imgtec.com> (raw)
In-Reply-To: <1415031108-15039-1-git-send-email-leon.alrae@imgtec.com>

From: Yongbok Kim <yongbok.kim@imgtec.com>

Remove the duplicated ieee_rm in gdbstub.c.
Make the other ieee_rm and ieee_ex_to_mips available to other files.

Reviewed-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 target-mips/cpu.h       | 4 ++++
 target-mips/gdbstub.c   | 7 -------
 target-mips/op_helper.c | 4 ++--
 3 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index d08bbe7..d21da8e 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -760,6 +760,10 @@ hwaddr cpu_mips_translate_address (CPUMIPSState *env, target_ulong address,
 #endif
 target_ulong exception_resume_pc (CPUMIPSState *env);
 
+/* op_helper.c */
+extern unsigned int ieee_rm[];
+int ieee_ex_to_mips(int xcpt);
+
 static inline void cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong *pc,
                                         target_ulong *cs_base, int *flags)
 {
diff --git a/target-mips/gdbstub.c b/target-mips/gdbstub.c
index 5b72d58..f65fec2 100644
--- a/target-mips/gdbstub.c
+++ b/target-mips/gdbstub.c
@@ -73,13 +73,6 @@ int mips_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
     return 0;
 }
 
-/* convert MIPS rounding mode in FCR31 to IEEE library */
-static unsigned int ieee_rm[] = {
-    float_round_nearest_even,
-    float_round_to_zero,
-    float_round_up,
-    float_round_down
-};
 #define RESTORE_ROUNDING_MODE \
     set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], \
                             &env->active_fpu.fp_status)
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 1b1c304..2a97721 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -2340,7 +2340,7 @@ void mips_cpu_unassigned_access(CPUState *cs, hwaddr addr,
 #define FP_TO_INT64_OVERFLOW 0x7fffffffffffffffULL
 
 /* convert MIPS rounding mode in FCR31 to IEEE library */
-static unsigned int ieee_rm[] = {
+unsigned int ieee_rm[] = {
     float_round_nearest_even,
     float_round_to_zero,
     float_round_up,
@@ -2461,7 +2461,7 @@ void helper_ctc1(CPUMIPSState *env, target_ulong arg1, uint32_t fs, uint32_t rt)
         do_raise_exception(env, EXCP_FPE, GETPC());
 }
 
-static inline int ieee_ex_to_mips(int xcpt)
+int ieee_ex_to_mips(int xcpt)
 {
     int ret = 0;
     if (xcpt) {
-- 
2.1.0

  parent reply	other threads:[~2014-11-03 16:12 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-03 16:11 [Qemu-devel] [PULL 00/34] target-mips queue Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 01/34] target-mips: add KScratch registers Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 02/34] softmmu: provide softmmu access type enum Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 03/34] target-mips: distinguish between data load and instruction fetch Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 04/34] target-mips: add RI and XI fields to TLB entry Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 05/34] target-mips: update PageGrain and m{t, f}c0 EntryLo{0, 1} Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 06/34] target-mips: add new Read-Inhibit and Execute-Inhibit exceptions Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 07/34] target-mips: add TLBINV support Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 08/34] target-mips: add BadInstr and BadInstrP support Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 09/34] target-mips: update cpu_save/cpu_load to support new registers Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 10/34] target-mips: add Config5.SBRI Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 11/34] target-mips: implement forbidden slot Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 12/34] target-mips: CP0_Status.CU0 no longer allows the user to access CP0 Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 13/34] target-mips: add restrictions for possible values in registers Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 14/34] target-mips: correctly handle access to unimplemented CP0 register Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 15/34] target-mips: enable features in MIPS64R6-generic CPU Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 16/34] target-mips: add MSA defines and data structure Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 17/34] target-mips: add MSA exceptions Leon Alrae
2014-11-03 16:11 ` Leon Alrae [this message]
2014-11-03 16:11 ` [Qemu-devel] [PULL 19/34] target-mips: stop translation after ctc1 Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 20/34] target-mips: add MSA opcode enum Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 21/34] target-mips: add msa_reset(), global msa register Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 22/34] target-mips: add msa_helper.c Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 23/34] target-mips: add MSA branch instructions Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 24/34] target-mips: add MSA I8 format instructions Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 25/34] target-mips: add MSA I5 format instruction Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 26/34] target-mips: add MSA BIT format instructions Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 27/34] target-mips: add MSA 3R " Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 28/34] target-mips: add MSA ELM " Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 29/34] target-mips: add MSA 3RF " Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 30/34] target-mips: add MSA VEC/2R " Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 31/34] target-mips: add MSA 2RF " Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 32/34] target-mips: add MSA MI10 " Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 33/34] disas/mips.c: disassemble MSA instructions Leon Alrae
2014-11-03 16:11 ` [Qemu-devel] [PULL 34/34] target-mips: add MSA support to mips32r5-generic Leon Alrae
2014-11-04 12:34 ` [Qemu-devel] [PULL 00/34] target-mips queue Peter Maydell

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