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From: "Radim Krčmář" <rkrcmar@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <rth@twiddle.net>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Andreas Färber" <afaerber@suse.de>
Subject: [Qemu-devel] [PATCH 1/3] target-i386: add apicid_pkg_width to topology.h
Date: Wed,  5 Nov 2014 22:53:31 +0100	[thread overview]
Message-ID: <1415224413-13972-2-git-send-email-rkrcmar@redhat.com> (raw)
In-Reply-To: <1415224413-13972-1-git-send-email-rkrcmar@redhat.com>

The APIC ID topology is made of three elements:
smt, core and pkg id;  bit width of first two is determined by the
actual number of hyperthreads/cores and pkg gets the rest.

Basic xAPIC unit tests are included.

Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
---
 target-i386/topology.h | 13 +++++++++++++
 tests/test-x86-cpuid.c |  9 +++++++++
 2 files changed, 22 insertions(+)

diff --git a/target-i386/topology.h b/target-i386/topology.h
index 07a6c5f..e87a685 100644
--- a/target-i386/topology.h
+++ b/target-i386/topology.h
@@ -70,6 +70,19 @@ static inline unsigned apicid_core_width(unsigned nr_cores, unsigned nr_threads)
     return apicid_bitwidth_for_count(nr_cores);
 }
 
+/* Bit width of the Pkg_ID field
+ */
+static inline unsigned apicid_pkg_width(unsigned nr_cores,
+                                        unsigned nr_threads,
+                                        unsigned apicid_limit)
+{
+    unsigned core_smt_width = apicid_core_width(nr_cores, nr_threads) +
+                              apicid_smt_width(nr_cores, nr_threads);
+    unsigned apicid_width = apicid_bitwidth_for_count(apicid_limit);
+
+    return apicid_width > core_smt_width ? apicid_width - core_smt_width : 0;
+}
+
 /* Bit offset of the Core_ID field
  */
 static inline unsigned apicid_core_offset(unsigned nr_cores,
diff --git a/tests/test-x86-cpuid.c b/tests/test-x86-cpuid.c
index 8d9f96a..6b74f08 100644
--- a/tests/test-x86-cpuid.c
+++ b/tests/test-x86-cpuid.c
@@ -31,6 +31,8 @@ static void test_topo_bits(void)
     /* simple tests for 1 thread per core, 1 core per socket */
     g_assert_cmpuint(apicid_smt_width(1, 1), ==, 0);
     g_assert_cmpuint(apicid_core_width(1, 1), ==, 0);
+    g_assert_cmpuint(apicid_pkg_width(1, 1, 255), ==, 8);
+    g_assert_cmpuint(apicid_pkg_width(1, 1, 256), ==, 8);
 
     g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 1, 0), ==, 0);
     g_assert_cmpuint(x86_apicid_from_cpu_idx(1, 1, 1), ==, 1);
@@ -55,6 +57,13 @@ static void test_topo_bits(void)
     g_assert_cmpuint(apicid_core_width(32, 2), ==, 5);
     g_assert_cmpuint(apicid_core_width(33, 2), ==, 6);
 
+    g_assert_cmpuint(apicid_pkg_width( 2,  2, 255), ==, 6);
+    g_assert_cmpuint(apicid_pkg_width(16, 16, 255), ==, 0);
+    g_assert_cmpuint(apicid_pkg_width(99, 99, 255), ==, 0);
+    g_assert_cmpuint(apicid_pkg_width( 7,  3, 255), ==, 3);
+    g_assert_cmpuint(apicid_pkg_width( 8,  3, 255), ==, 3);
+    g_assert_cmpuint(apicid_pkg_width( 9,  3, 255), ==, 2);
+    g_assert_cmpuint(apicid_pkg_width(12,  6, 255), ==, 1);
 
     /* build a weird topology and see if IDs are calculated correctly
      */
-- 
2.1.0

  reply	other threads:[~2014-11-05 21:54 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-05 21:53 [Qemu-devel] [PATCH 0/3] Improve error message on invalid CPU topologies Radim Krčmář
2014-11-05 21:53 ` Radim Krčmář [this message]
2014-11-05 21:53 ` [Qemu-devel] [PATCH 2/3] target-i386: introduce x86_cpu_nr_apic_ids Radim Krčmář
2014-11-05 21:53 ` [Qemu-devel] [PATCH 3/3] pc: improve error message on invalid topologies Radim Krčmář

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