From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53069) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Xmh17-00044B-Hl for qemu-devel@nongnu.org; Fri, 07 Nov 2014 05:43:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Xmh12-0003tO-F5 for qemu-devel@nongnu.org; Fri, 07 Nov 2014 05:43:45 -0500 Received: from mailapp01.imgtec.com ([195.59.15.196]:59990) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Xmh12-0003tK-9d for qemu-devel@nongnu.org; Fri, 07 Nov 2014 05:43:40 -0500 From: Yongbok Kim Date: Fri, 7 Nov 2014 10:43:21 +0000 Message-ID: <1415357001-52690-1-git-send-email-yongbok.kim@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [PATCH] target-mips: fix multiple TCG registers covering same data List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: leon.alrae@imgtec.com, aurelien@aurel32.net, rth@twiddle.net Avoid to allocate different TCG registers for the FPU registers that are mapped on the MSA vectore registers. Signed-off-by: Yongbok Kim --- target-mips/translate.c | 8 +++----- 1 files changed, 3 insertions(+), 5 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index b43b286..95d8071 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -20200,14 +20200,12 @@ void mips_tcg_init(void) regnames[i]); for (i = 0; i < 32; i++) { - int off = offsetof(CPUMIPSState, active_fpu.fpr[i]); - fpu_f64[i] = tcg_global_mem_new_i64(TCG_AREG0, off, fregnames[i]); - } - - for (i = 0; i < 32; i++) { int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]); msa_wr_d[i * 2] = tcg_global_mem_new_i64(TCG_AREG0, off, msaregnames[i * 2]); + /* The scalar floating-point unit (FPU) registers are mapped on + * the MSA vector registers. */ + fpu_f64[i] = msa_wr_d[i * 2]; off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]); msa_wr_d[i * 2 + 1] = tcg_global_mem_new_i64(TCG_AREG0, off, msaregnames[i * 2 + 1]); -- 1.7.4