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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: aurelien@aurel32.net
Subject: [Qemu-devel] [PATCH 2.3 3/8] tcg: Move emit of INDEX_op_end into gen_tb_end
Date: Tue, 11 Nov 2014 17:24:47 +0100	[thread overview]
Message-ID: <1415723092-4088-4-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1415723092-4088-1-git-send-email-rth@twiddle.net>

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 include/exec/gen-icount.h     | 2 ++
 target-alpha/translate.c      | 2 +-
 target-arm/translate-a64.c    | 1 -
 target-arm/translate.c        | 1 -
 target-cris/translate.c       | 2 +-
 target-i386/translate.c       | 2 +-
 target-lm32/translate.c       | 2 +-
 target-m68k/translate.c       | 1 -
 target-microblaze/translate.c | 2 +-
 target-mips/translate.c       | 2 +-
 target-moxie/translate.c      | 2 +-
 target-openrisc/translate.c   | 2 +-
 target-ppc/translate.c        | 2 +-
 target-s390x/translate.c      | 2 +-
 target-sh4/translate.c        | 2 +-
 target-sparc/translate.c      | 2 +-
 target-tricore/translate.c    | 1 -
 target-unicore32/translate.c  | 1 -
 target-xtensa/translate.c     | 1 -
 19 files changed, 14 insertions(+), 18 deletions(-)

diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
index da53395..d5266ff 100644
--- a/include/exec/gen-icount.h
+++ b/include/exec/gen-icount.h
@@ -48,6 +48,8 @@ static void gen_tb_end(TranslationBlock *tb, int num_insns)
         gen_set_label(icount_label);
         tcg_gen_exit_tb((uintptr_t)tb + TB_EXIT_ICOUNT_EXPIRED);
     }
+
+    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
 }
 
 static inline void gen_io_start(void)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 76658a0..bb85c2d 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -2912,7 +2912,7 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu,
     }
 
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 80d2c07..220ebba 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -11090,7 +11090,6 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
 
 done_generating:
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
 
 #ifdef DEBUG_DISAS
     if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
diff --git a/target-arm/translate.c b/target-arm/translate.c
index af51568..c31c3dc 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -11325,7 +11325,6 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
 
 done_generating:
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
 
 #ifdef DEBUG_DISAS
     if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
diff --git a/target-cris/translate.c b/target-cris/translate.c
index e37b04e..e9acaeb 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3348,7 +3348,7 @@ gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb,
         }
     }
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 782f7d2..1a2e610 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -8040,7 +8040,7 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu,
         gen_io_end();
 done_generating:
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     /* we don't forget to fill the last values */
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index 8454e8b..482b8dd 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -1158,7 +1158,7 @@ void gen_intermediate_code_internal(LM32CPU *cpu,
     }
 
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index efd4cfc..2c396ef 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -3075,7 +3075,6 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb,
         }
     }
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
 
 #ifdef DEBUG_DISAS
     if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index fd2b771..0e3d612 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1846,7 +1846,7 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb,
         }
     }
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-mips/translate.c b/target-mips/translate.c
index f0b8e6f..ff51bc9 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -19133,7 +19133,7 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb,
     }
 done_generating:
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-moxie/translate.c b/target-moxie/translate.c
index 4541b9b..675c4d0 100644
--- a/target-moxie/translate.c
+++ b/target-moxie/translate.c
@@ -900,7 +900,7 @@ gen_intermediate_code_internal(MoxieCPU *cpu, TranslationBlock *tb,
     }
  done_generating:
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 407bd97..9dcc9ae 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -1759,7 +1759,7 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu,
     }
 
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         k++;
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 910ce56..9ab81a9 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -11449,7 +11449,7 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu,
         tcg_gen_exit_tb(0);
     }
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (unlikely(search_pc)) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index dbf1993..661d110 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -4856,7 +4856,7 @@ static inline void gen_intermediate_code_internal(S390CPU *cpu,
     }
 
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 3088edc..0550611 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -1962,7 +1962,7 @@ gen_intermediate_code_internal(SuperHCPU *cpu, TranslationBlock *tb,
     }
 
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (search_pc) {
         i = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         ii++;
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 78c4e21..fc239bd 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -5342,7 +5342,7 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu,
         }
     }
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
+
     if (spc) {
         j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
         lj++;
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index d5a9596..48b1a5e 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -2468,7 +2468,6 @@ gen_intermediate_code_internal(TriCoreCPU *cpu, struct TranslationBlock *tb,
     }
 
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
     if (search_pc) {
         printf("done_generating search pc\n");
     } else {
diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
index 653c225..04ee3c2 100644
--- a/target-unicore32/translate.c
+++ b/target-unicore32/translate.c
@@ -2037,7 +2037,6 @@ static inline void gen_intermediate_code_internal(UniCore32CPU *cpu,
 
 done_generating:
     gen_tb_end(tb, num_insns);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
 
 #ifdef DEBUG_DISAS
     if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index badca19..8e135fc 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -3097,7 +3097,6 @@ void gen_intermediate_code_internal(XtensaCPU *cpu,
         gen_jumpi(&dc, dc.pc, 0);
     }
     gen_tb_end(tb, insn_count);
-    *tcg_ctx.gen_opc_ptr = INDEX_op_end;
 
 #ifdef DEBUG_DISAS
     if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
-- 
1.9.3

  parent reply	other threads:[~2014-11-11 16:25 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-11 16:24 [Qemu-devel] [PATCH 2.3 0/8] Linked list for tcg ops Richard Henderson
2014-11-11 16:24 ` [Qemu-devel] [PATCH 2.3 1/8] tcg: Move some opcode generation functions out of line Richard Henderson
2014-11-14 18:01   ` Bastian Koppelmann
2014-11-11 16:24 ` [Qemu-devel] [PATCH 2.3 2/8] tcg: Reduce ifdefs in tcg-op.c Richard Henderson
2014-11-14 18:20   ` Bastian Koppelmann
2014-11-11 16:24 ` Richard Henderson [this message]
2014-11-13 15:57   ` [Qemu-devel] [PATCH 2.3 3/8] tcg: Move emit of INDEX_op_end into gen_tb_end Bastian Koppelmann
2014-11-11 16:24 ` [Qemu-devel] [PATCH 2.3 4/8] tcg: Introduce tcg_op_buf_count and tcg_op_buf_full Richard Henderson
2014-11-13 16:13   ` Bastian Koppelmann
2014-11-11 16:24 ` [Qemu-devel] [PATCH 2.3 5/8] tcg: Put opcodes in a linked list Richard Henderson
2014-11-14 15:03   ` Bastian Koppelmann
2014-11-11 16:24 ` [Qemu-devel] [PATCH 2.3 6/8] tcg: Remove opcodes instead of noping them out Richard Henderson
2014-11-14 15:08   ` Bastian Koppelmann
2014-11-11 16:24 ` [Qemu-devel] [PATCH 2.3 7/8] tcg: Implement insert_op_before Richard Henderson
2014-11-14 15:25   ` Bastian Koppelmann
2014-11-14 14:46     ` Richard Henderson
2014-11-11 16:24 ` [Qemu-devel] [PATCH 2.3 8/8] tcg: Remove unused opcodes Richard Henderson
2014-11-14 15:31   ` Bastian Koppelmann
2014-11-14 14:47     ` Richard Henderson
2014-11-14 18:22 ` [Qemu-devel] [PATCH 2.3 0/8] Linked list for tcg ops Bastian Koppelmann
2015-01-03  8:46 ` Paolo Bonzini

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