From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59815) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XpN50-0002Jh-1R for qemu-devel@nongnu.org; Fri, 14 Nov 2014 15:02:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XpN4p-0007KS-0m for qemu-devel@nongnu.org; Fri, 14 Nov 2014 15:02:49 -0500 From: Tom Musta Date: Fri, 14 Nov 2014 14:01:41 -0600 Message-Id: <1415995301-13402-1-git-send-email-tommusta@gmail.com> Subject: [Qemu-devel] [PATCH] target-ppc: Altivec's mtvscr Decodes Wrong Register List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Tom Musta , agraf@suse.de The Move to Vector Status and Control Register (mtvscr) instruction uses VRB as the source register. Fix the code generator to correctly decode the VRB field. That is, use "rB(ctx->opcode)" instead of "rD(ctx->opcode)". Signed-off-by: Tom Musta --- target-ppc/translate.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 910ce56..d381632 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -6848,7 +6848,7 @@ static void gen_mtvscr(DisasContext *ctx) gen_exception(ctx, POWERPC_EXCP_VPU); return; } - p = gen_avr_ptr(rD(ctx->opcode)); + p = gen_avr_ptr(rB(ctx->opcode)); gen_helper_mtvscr(cpu_env, p); tcg_temp_free_ptr(p); } -- 1.7.1