From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42226) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XqaNs-0007Jk-6x for qemu-devel@nongnu.org; Mon, 17 Nov 2014 23:27:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XqaNm-0000Ir-Ag for qemu-devel@nongnu.org; Mon, 17 Nov 2014 23:27:20 -0500 Received: from mail-qg0-f45.google.com ([209.85.192.45]:54457) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XqaNm-0000Il-74 for qemu-devel@nongnu.org; Mon, 17 Nov 2014 23:27:14 -0500 Received: by mail-qg0-f45.google.com with SMTP id z107so16205455qgd.18 for ; Mon, 17 Nov 2014 20:27:14 -0800 (PST) Received: from localhost (207-172-170-53.c3-0.avec-ubr1.nyr-avec.ny.cable.rcn.com. [207.172.170.53]) by mx.google.com with ESMTPSA id z21sm26746961qge.25.2014.11.17.20.27.12 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 17 Nov 2014 20:27:13 -0800 (PST) From: Kevin O'Connor Date: Mon, 17 Nov 2014 23:26:40 -0500 Message-Id: <1416284800-2759-5-git-send-email-kevin@koconnor.net> In-Reply-To: <1416284800-2759-1-git-send-email-kevin@koconnor.net> References: <1416284800-2759-1-git-send-email-kevin@koconnor.net> Subject: [Qemu-devel] [PATCH 4/4] sdhci: Set a default frequency clock List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org The Linux SDHCI PCI driver will only register the device if there is a clock frequency set. So, set a default frequency of 52Mhz. Signed-off-by: Kevin O'Connor --- hw/sd/sdhci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 55709da..a16b734 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -74,10 +74,10 @@ #define SDHC_CAPAB_MAXBLOCKLENGTH 512ul /* Maximum clock frequency for SDclock in MHz * value in range 10-63 MHz, 0 - not defined */ -#define SDHC_CAPAB_BASECLKFREQ 0ul +#define SDHC_CAPAB_BASECLKFREQ 52ul #define SDHC_CAPAB_TOUNIT 1ul /* Timeout clock unit 0 - kHz, 1 - MHz */ /* Timeout clock frequency 1-63, 0 - not defined */ -#define SDHC_CAPAB_TOCLKFREQ 0ul +#define SDHC_CAPAB_TOCLKFREQ 52ul /* Now check all parameters and calculate CAPABILITIES REGISTER value */ #if SDHC_CAPAB_64BITBUS > 1 || SDHC_CAPAB_18V > 1 || SDHC_CAPAB_30V > 1 || \ -- 1.9.3