From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: ehabkost@redhat.com
Subject: [Qemu-devel] [PATCH 3/4] target-i386: add f16c and rdrand to Haswell and Broadwell
Date: Fri, 5 Dec 2014 18:44:25 +0100 [thread overview]
Message-ID: <1417801466-23485-4-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1417801466-23485-1-git-send-email-pbonzini@redhat.com>
Both were added in Ivy Bridge (for which we do not have a CPU model
yet!).
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/i386/pc_piix.c | 4 ++++
hw/i386/pc_q35.c | 4 ++++
target-i386/cpu.c | 4 ++--
3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 3f1524e..cd9f917 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -320,6 +320,10 @@ static void pc_compat_2_2(MachineState *machine)
x86_cpu_compat_set_features("Opteron_G3", FEAT_1_ECX, CPUID_EXT_VME, 0);
x86_cpu_compat_set_features("Opteron_G4", FEAT_1_ECX, CPUID_EXT_VME, 0);
x86_cpu_compat_set_features("Opteron_G5", FEAT_1_ECX, CPUID_EXT_VME, 0);
+ x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, CPUID_EXT_F16C, 0);
+ x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, CPUID_EXT_RDRAND, 0);
+ x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, CPUID_EXT_F16C, 0);
+ x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, CPUID_EXT_RDRAND, 0);
}
static void pc_compat_2_1(MachineState *machine)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index bec234a..f225276 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -299,6 +299,10 @@ static void pc_compat_2_2(MachineState *machine)
x86_cpu_compat_set_features("Opteron_G3", FEAT_1_ECX, CPUID_EXT_VME, 0);
x86_cpu_compat_set_features("Opteron_G4", FEAT_1_ECX, CPUID_EXT_VME, 0);
x86_cpu_compat_set_features("Opteron_G5", FEAT_1_ECX, CPUID_EXT_VME, 0);
+ x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, CPUID_EXT_F16C, 0);
+ x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, CPUID_EXT_RDRAND, 0);
+ x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, CPUID_EXT_F16C, 0);
+ x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, CPUID_EXT_RDRAND, 0);
}
static void pc_compat_2_1(MachineState *machine)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 136c457..b2bb9a4 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1060,7 +1060,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
- CPUID_EXT_PCID,
+ CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
.features[FEAT_8000_0001_EDX] =
CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
CPUID_EXT2_SYSCALL,
@@ -1095,7 +1095,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
- CPUID_EXT_PCID,
+ CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
.features[FEAT_8000_0001_EDX] =
CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
CPUID_EXT2_SYSCALL,
--
1.8.3.1
next prev parent reply other threads:[~2014-12-05 17:45 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-05 17:44 [Qemu-devel] [PATCH 0/3] x86 CPU model fixes Paolo Bonzini
2014-12-05 17:44 ` [Qemu-devel] [PATCH 1/4] pc: add 2.3 machine types Paolo Bonzini
2014-12-05 18:14 ` Eduardo Habkost
2014-12-05 18:18 ` Paolo Bonzini
2014-12-05 17:44 ` [Qemu-devel] [PATCH 2/4] target-i386: add VME to all CPUs Paolo Bonzini
2014-12-05 18:32 ` Eduardo Habkost
2014-12-05 18:36 ` Paolo Bonzini
2014-12-05 17:44 ` Paolo Bonzini [this message]
2014-12-05 18:35 ` [Qemu-devel] [PATCH 3/4] target-i386: add f16c and rdrand to Haswell and Broadwell Eduardo Habkost
2014-12-05 17:44 ` [Qemu-devel] [PATCH 4/4] target-i386: add Ivy Bridge CPU model Paolo Bonzini
2014-12-05 18:36 ` Eduardo Habkost
2014-12-05 18:39 ` Paolo Bonzini
2014-12-05 18:58 ` Eduardo Habkost
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