From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: ehabkost@redhat.com
Subject: [Qemu-devel] [PATCH 4/4] target-i386: add Ivy Bridge CPU model
Date: Fri, 5 Dec 2014 18:44:26 +0100 [thread overview]
Message-ID: <1417801466-23485-5-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1417801466-23485-1-git-send-email-pbonzini@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target-i386/cpu.c | 34 +++++++++++++++++++++++++++++++++-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index b2bb9a4..7767564 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1039,7 +1039,39 @@ static X86CPUDefinition builtin_x86_defs[] = {
.features[FEAT_XSAVE] =
CPUID_XSAVE_XSAVEOPT,
.xlevel = 0x8000000A,
- .model_id = "Intel Xeon E312xx (Sandy Bridge)",
+ .model_id = "Intel Xeon E3-12xx (Sandy Bridge)",
+ },
+ {
+ .name = "IvyBridge",
+ .level = 0xd,
+ .vendor = CPUID_VENDOR_INTEL,
+ .family = 6,
+ .model = 58,
+ .stepping = 9,
+ .features[FEAT_1_EDX] =
+ CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
+ CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
+ CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
+ CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
+ CPUID_DE | CPUID_FP87,
+ .features[FEAT_1_ECX] =
+ CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
+ CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_POPCNT |
+ CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
+ CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ |
+ CPUID_EXT_SSE3 | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
+ .features[FEAT_7_0_EBX] =
+ CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_SMEP |
+ CPUID_7_0_EBX_ERMS,
+ .features[FEAT_8000_0001_EDX] =
+ CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
+ CPUID_EXT2_SYSCALL,
+ .features[FEAT_8000_0001_ECX] =
+ CPUID_EXT3_LAHF_LM,
+ .features[FEAT_XSAVE] =
+ CPUID_XSAVE_XSAVEOPT,
+ .xlevel = 0x8000000A,
+ .model_id = "Intel Xeon E3-12xx v2 (Ivy Bridge)",
},
{
.name = "Haswell",
--
1.8.3.1
next prev parent reply other threads:[~2014-12-05 17:44 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-05 17:44 [Qemu-devel] [PATCH 0/3] x86 CPU model fixes Paolo Bonzini
2014-12-05 17:44 ` [Qemu-devel] [PATCH 1/4] pc: add 2.3 machine types Paolo Bonzini
2014-12-05 18:14 ` Eduardo Habkost
2014-12-05 18:18 ` Paolo Bonzini
2014-12-05 17:44 ` [Qemu-devel] [PATCH 2/4] target-i386: add VME to all CPUs Paolo Bonzini
2014-12-05 18:32 ` Eduardo Habkost
2014-12-05 18:36 ` Paolo Bonzini
2014-12-05 17:44 ` [Qemu-devel] [PATCH 3/4] target-i386: add f16c and rdrand to Haswell and Broadwell Paolo Bonzini
2014-12-05 18:35 ` Eduardo Habkost
2014-12-05 17:44 ` Paolo Bonzini [this message]
2014-12-05 18:36 ` [Qemu-devel] [PATCH 4/4] target-i386: add Ivy Bridge CPU model Eduardo Habkost
2014-12-05 18:39 ` Paolo Bonzini
2014-12-05 18:58 ` Eduardo Habkost
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