From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45721) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Xyf6c-0003jj-9g for qemu-devel@nongnu.org; Wed, 10 Dec 2014 06:07:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Xyf6T-00057z-5w for qemu-devel@nongnu.org; Wed, 10 Dec 2014 06:06:54 -0500 Received: from mail-wg0-x232.google.com ([2a00:1450:400c:c00::232]:39395) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Xyf6S-00057W-W5 for qemu-devel@nongnu.org; Wed, 10 Dec 2014 06:06:45 -0500 Received: by mail-wg0-f50.google.com with SMTP id a1so3263503wgh.37 for ; Wed, 10 Dec 2014 03:06:44 -0800 (PST) Sender: Paolo Bonzini From: Paolo Bonzini Date: Wed, 10 Dec 2014 12:06:31 +0100 Message-Id: <1418209592-9373-4-git-send-email-pbonzini@redhat.com> In-Reply-To: <1418209592-9373-1-git-send-email-pbonzini@redhat.com> References: <1418209592-9373-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PATCH v2 3/4] target-i386: add f16c and rdrand to Haswell and Broadwell List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: ehabkost@redhat.com Both were added in Ivy Bridge (for which we do not have a CPU model yet!). Signed-off-by: Paolo Bonzini --- hw/i386/pc_piix.c | 4 ++++ hw/i386/pc_q35.c | 4 ++++ target-i386/cpu.c | 4 ++-- 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index e273003..0df9cf9 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -320,6 +320,10 @@ static void pc_compat_2_2(MachineState *machine) x86_cpu_compat_set_features("Opteron_G3", FEAT_1_ECX, 0, CPUID_EXT_VME); x86_cpu_compat_set_features("Opteron_G4", FEAT_1_ECX, 0, CPUID_EXT_VME); x86_cpu_compat_set_features("Opteron_G5", FEAT_1_ECX, 0, CPUID_EXT_VME); + x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_F16C); + x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND); + x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_F16C); + x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND); } static void pc_compat_2_1(MachineState *machine) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 70c025e..4a198ee 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -299,6 +299,10 @@ static void pc_compat_2_2(MachineState *machine) x86_cpu_compat_set_features("Opteron_G3", FEAT_1_ECX, 0, CPUID_EXT_VME); x86_cpu_compat_set_features("Opteron_G4", FEAT_1_ECX, 0, CPUID_EXT_VME); x86_cpu_compat_set_features("Opteron_G5", FEAT_1_ECX, 0, CPUID_EXT_VME); + x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_F16C); + x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND); + x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_F16C); + x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND); } static void pc_compat_2_1(MachineState *machine) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 136c457..b2bb9a4 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1060,7 +1060,7 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 | CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE | - CPUID_EXT_PCID, + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND, .features[FEAT_8000_0001_EDX] = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX | CPUID_EXT2_SYSCALL, @@ -1095,7 +1095,7 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 | CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE | - CPUID_EXT_PCID, + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND, .features[FEAT_8000_0001_EDX] = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX | CPUID_EXT2_SYSCALL, -- 1.8.3.1