[Qemu-devel] [PULL 0/3] Collected target-i386 patches

[Qemu-devel] [PULL 0/3] Collected target-i386 patches

[Richard Henderson]

I'm sure I haven't gotten all of them that have been outstanding
over the last couple of months, but at least here's a couple.


r~


The following changes since commit 99c9c3cb24e566258a0a141178934f9cb5198842:

  Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2014-12-11' into staging (2014-12-11 18:27:02 +0000)

are available in the git repository at:

  git://github.com/rth7680/qemu.git tags/x86-next-20141214

for you to fetch changes up to c4d4525c38cd93cc5d1a743976eb25ac571d435f:

  target-i386: fix icount processing for repz instructions (2014-12-14 16:48:38 -0600)

----------------------------------------------------------------
Collected x86 patches

----------------------------------------------------------------
Dmitry Poletaev (2):
      target-i386: Wrong conversion infinity from float80 to int32/int64
      target-i386: fbld instruction doesn't set minus sign

Pavel Dovgalyuk (1):
      target-i386: fix icount processing for repz instructions

 target-i386/fpu_helper.c | 22 ++++++++++++++++++++--
 target-i386/translate.c  | 16 ++++++++++++++--
 2 files changed, 34 insertions(+), 4 deletions(-)

[Qemu-devel] [PULL 1/3] target-i386: Wrong conversion infinity from float80 to int32/int64

[Richard Henderson]

From: Dmitry Poletaev <poletaev-qemu@yandex.ru>

Signed-off-by: Dmitry Poletaev <poletaev-qemu@yandex.ru>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-i386/fpu_helper.c | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/target-i386/fpu_helper.c b/target-i386/fpu_helper.c
index 1d4eee3..8768e1c 100644
--- a/target-i386/fpu_helper.c
+++ b/target-i386/fpu_helper.c
@@ -251,16 +251,34 @@ int32_t helper_fist_ST0(CPUX86State *env)
 int32_t helper_fistl_ST0(CPUX86State *env)
 {
     int32_t val;
+    signed char old_exp_flags;
+
+    old_exp_flags = get_float_exception_flags(&env->fp_status);
+    set_float_exception_flags(0, &env->fp_status);
 
     val = floatx80_to_int32(ST0, &env->fp_status);
+    if (get_float_exception_flags(&env->fp_status) & float_flag_invalid) {
+        val = 0x80000000;
+    }
+    set_float_exception_flags(get_float_exception_flags(&env->fp_status)
+                                | old_exp_flags, &env->fp_status);
     return val;
 }
 
 int64_t helper_fistll_ST0(CPUX86State *env)
 {
     int64_t val;
+    signed char old_exp_flags;
 
-    val = floatx80_to_int64(ST0, &env->fp_status);
+    old_exp_flags = get_float_exception_flags(&env->fp_status);
+    set_float_exception_flags(0, &env->fp_status);
+
+    val = floatx80_to_int32(ST0, &env->fp_status);
+    if (get_float_exception_flags(&env->fp_status) & float_flag_invalid) {
+        val = 0x8000000000000000ULL;
+    }
+    set_float_exception_flags(get_float_exception_flags(&env->fp_status)
+                                | old_exp_flags, &env->fp_status);
     return val;
 }
 
-- 
2.1.0

[Qemu-devel] [PULL 2/3] target-i386: fbld instruction doesn't set minus sign

[Richard Henderson]

From: Dmitry Poletaev <poletaev-qemu@yandex.ru>

Signed-off-by: Dmitry Poletaev <poletaev-qemu@yandex.ru>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-i386/fpu_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target-i386/fpu_helper.c b/target-i386/fpu_helper.c
index 8768e1c..30d34d5 100644
--- a/target-i386/fpu_helper.c
+++ b/target-i386/fpu_helper.c
@@ -639,7 +639,7 @@ void helper_fbld_ST0(CPUX86State *env, target_ulong ptr)
     }
     tmp = int64_to_floatx80(val, &env->fp_status);
     if (cpu_ldub_data(env, ptr + 9) & 0x80) {
-        floatx80_chs(tmp);
+        tmp = floatx80_chs(tmp);
     }
     fpush(env);
     ST0 = tmp;
-- 
2.1.0

[Qemu-devel] [PULL 3/3] target-i386: fix icount processing for repz instructions

[Richard Henderson]

From: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru>

TCG generates optimized code for i386 repz instructions in single step mode.
It means that when ecx becomes 0, execution of the string instruction breaks
immediately without an additional iteration for ecx==0 (which will only check
ecx and set the flags). Omitting this iteration leads to different
instructions counting in singlestep mode and in normal execution.
This patch disables optimization of this last iteration for icount mode
which should be deterministic.

v2: inverted the condition and formatted the comment

Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-i386/translate.c | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/target-i386/translate.c b/target-i386/translate.c
index 782f7d2..6243e36 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -115,6 +115,7 @@ typedef struct DisasContext {
     int tf;     /* TF cpu flag */
     int singlestep_enabled; /* "hardware" single step enabled */
     int jmp_opt; /* use direct block chaining for direct jumps */
+    int repz_opt; /* optimize jumps within repz instructions */
     int mem_index; /* select memory access functions */
     uint64_t flags; /* all execution flags */
     struct TranslationBlock *tb;
@@ -1215,7 +1216,7 @@ static inline void gen_repz_ ## op(DisasContext *s, TCGMemOp ot,              \
     gen_op_add_reg_im(s->aflag, R_ECX, -1);                                   \
     /* a loop would cause two single step exceptions if ECX = 1               \
        before rep string_insn */                                              \
-    if (!s->jmp_opt)                                                          \
+    if (s->repz_opt)                                                          \
         gen_op_jz_ecx(s->aflag, l2);                                          \
     gen_jmp(s, cur_eip);                                                      \
 }
@@ -1233,7 +1234,7 @@ static inline void gen_repz_ ## op(DisasContext *s, TCGMemOp ot,              \
     gen_op_add_reg_im(s->aflag, R_ECX, -1);                                   \
     gen_update_cc_op(s);                                                      \
     gen_jcc1(s, (JCC_Z << 1) | (nz ^ 1), l2);                                 \
-    if (!s->jmp_opt)                                                          \
+    if (s->repz_opt)                                                          \
         gen_op_jz_ecx(s->aflag, l2);                                          \
     gen_jmp(s, cur_eip);                                                      \
 }
@@ -7951,6 +7952,17 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu,
                     || (flags & HF_SOFTMMU_MASK)
 #endif
                     );
+    /* Do not optimize repz jumps at all in icount mode, because
+       rep movsS instructions are execured with different paths
+       in !repz_opt and repz_opt modes. The first one was used
+       always except single step mode. And this setting
+       disables jumps optimization and control paths become
+       equivalent in run and single step modes.
+       Now there will be no jump optimization for repz in
+       record/replay modes and there will always be an
+       additional step for ecx=0 when icount is enabled.
+     */
+    dc->repz_opt = !dc->jmp_opt && !use_icount;
 #if 0
     /* check addseg logic */
     if (!dc->addseg && (dc->vm86 || !dc->pe || !dc->code32))
-- 
2.1.0

Re: [Qemu-devel] [PULL 0/3] Collected target-i386 patches

[Peter Maydell]

On 14 December 2014 at 23:00, Richard Henderson <rth@twiddle.net> wrote:
> I'm sure I haven't gotten all of them that have been outstanding
> over the last couple of months, but at least here's a couple.
>
>
> r~
>
>
> The following changes since commit 99c9c3cb24e566258a0a141178934f9cb5198842:
>
>   Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2014-12-11' into staging (2014-12-11 18:27:02 +0000)
>
> are available in the git repository at:
>
>   git://github.com/rth7680/qemu.git tags/x86-next-20141214
>
> for you to fetch changes up to c4d4525c38cd93cc5d1a743976eb25ac571d435f:
>
>   target-i386: fix icount processing for repz instructions (2014-12-14 16:48:38 -0600)
>
> ----------------------------------------------------------------
> Collected x86 patches
>
> ----------------------------------------------------------------

Applied, thanks.

-- PMM