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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 36/47] target-i386: add Ivy Bridge CPU model
Date: Mon, 15 Dec 2014 17:38:20 +0100	[thread overview]
Message-ID: <1418661511-22348-37-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1418661511-22348-1-git-send-email-pbonzini@redhat.com>

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target-i386/cpu.c | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index b2bb9a4..b81ac5c 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1042,6 +1042,38 @@ static X86CPUDefinition builtin_x86_defs[] = {
         .model_id = "Intel Xeon E312xx (Sandy Bridge)",
     },
     {
+        .name = "IvyBridge",
+        .level = 0xd,
+        .vendor = CPUID_VENDOR_INTEL,
+        .family = 6,
+        .model = 58,
+        .stepping = 9,
+        .features[FEAT_1_EDX] =
+            CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
+            CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
+            CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
+            CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
+            CPUID_DE | CPUID_FP87,
+        .features[FEAT_1_ECX] =
+            CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
+            CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_POPCNT |
+            CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
+            CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ |
+            CPUID_EXT_SSE3 | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
+        .features[FEAT_7_0_EBX] =
+            CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_SMEP |
+            CPUID_7_0_EBX_ERMS,
+        .features[FEAT_8000_0001_EDX] =
+            CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
+            CPUID_EXT2_SYSCALL,
+        .features[FEAT_8000_0001_ECX] =
+            CPUID_EXT3_LAHF_LM,
+        .features[FEAT_XSAVE] =
+            CPUID_XSAVE_XSAVEOPT,
+        .xlevel = 0x8000000A,
+        .model_id = "Intel Xeon E3-12xx v2 (Ivy Bridge)",
+    },
+    {
         .name = "Haswell",
         .level = 0xd,
         .vendor = CPUID_VENDOR_INTEL,
-- 
1.8.3.1

  parent reply	other threads:[~2014-12-15 16:40 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-15 16:37 [Qemu-devel] [PULL 00/47] Patches for KVM, x86, SCSI, migration fixes (2014-12-15) Paolo Bonzini
2014-12-15 16:37 ` [Qemu-devel] [PULL 01/47] Add bootloader name to multiboot implementation Paolo Bonzini
2014-12-15 16:37 ` [Qemu-devel] [PULL 02/47] target-i386: simplify AES emulation Paolo Bonzini
2014-12-15 16:37 ` [Qemu-devel] [PULL 03/47] KVM_CAP_IRQFD and KVM_CAP_IRQFD_RESAMPLE checks Paolo Bonzini
2014-12-15 16:37 ` [Qemu-devel] [PULL 04/47] vfio: use kvm_resamplefds_enabled() Paolo Bonzini
2014-12-15 16:37 ` [Qemu-devel] [PULL 05/47] valgrind: avoid false positives in KVM_GET_DIRTY_LOG ioctl Paolo Bonzini
2014-12-15 16:37 ` [Qemu-devel] [PULL 06/47] valgrind/i386: avoid false positives on KVM_SET_CLOCK ioctl Paolo Bonzini
2014-12-15 16:37 ` [Qemu-devel] [PULL 07/47] valgrind/i386: avoid false positives on KVM_SET_PIT ioctl Paolo Bonzini
2014-12-15 16:37 ` [Qemu-devel] [PULL 08/47] valgrind/i386: avoid false positives on KVM_SET_XCRS ioctl Paolo Bonzini
2014-12-15 16:37 ` [Qemu-devel] [PULL 09/47] valgrind/i386: avoid false positives on KVM_SET_MSRS ioctl Paolo Bonzini
2014-12-15 16:37 ` [Qemu-devel] [PULL 10/47] valgrind/i386: avoid false positives on KVM_GET_MSRS ioctl Paolo Bonzini
2014-12-15 16:37 ` [Qemu-devel] [PULL 11/47] valgrind/i386: avoid false positives on KVM_SET_VCPU_EVENTS ioctl Paolo Bonzini
2014-12-15 16:37 ` [Qemu-devel] [PULL 12/47] valgrind/s390x: avoid false positives on KVM_SET_FPU ioctl Paolo Bonzini
2014-12-15 16:37 ` [Qemu-devel] [PULL 13/47] coverity/s390x: avoid false positive in kvm_irqchip_add_adapter_route Paolo Bonzini
2014-12-15 16:37 ` [Qemu-devel] [PULL 14/47] target-i386: add feature flags for CPUID[EAX=0xd, ECX=1] Paolo Bonzini
2014-12-15 16:37 ` [Qemu-devel] [PULL 15/47] target-mips: kvm: do not use get_clock() Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 16/47] target-i386: get/set/migrate XSAVES state Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 17/47] x86: Drop superfluous conditionals around g_free() Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 18/47] x86: Fuse g_malloc(); memset() into g_malloc0() Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 19/47] x86: Use g_new() & friends where that makes obvious sense Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 20/47] x86: Drop some superfluous casts from void * Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 21/47] scsi: Drop superfluous conditionals around g_free() Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 22/47] scsi: Fuse g_malloc(); memset() into g_malloc0() Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 23/47] scsi: Use g_new() & friends where that makes obvious sense Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 24/47] scsi-disk: provide maximum transfer length Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 25/47] cpu-exec: fix cpu_exec_nocache Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 26/47] cpu-exec: reset exception_index correctly Paolo Bonzini
2014-12-19  2:19   ` Eduardo Habkost
2014-12-23  6:55     ` Pavel Dovgaluk
     [not found]     ` <2162.40673694319$1419317788@news.gmane.org>
2014-12-23  8:54       ` Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 27/47] icount: set can_do_io outside TB execution Paolo Bonzini
2014-12-17  8:53   ` Pavel Dovgaluk
2014-12-17  9:19     ` Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 28/47] icount: introduce cpu_get_icount_raw Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 29/47] cpu-exec: invalidate nocache translation if they are interrupted Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 30/47] timer: introduce new QEMU_CLOCK_VIRTUAL_RT clock Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 31/47] cpus: make icount warp behave well with respect to stop/cont Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 32/47] i386: do not cross the pages boundaries in replay mode Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 33/47] pc: add 2.3 machine types Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 34/47] target-i386: add VME to all CPUs Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 35/47] target-i386: add f16c and rdrand to Haswell and Broadwell Paolo Bonzini
2014-12-15 16:38 ` Paolo Bonzini [this message]
2014-12-15 16:38 ` [Qemu-devel] [PULL 37/47] kvm/apic: fix 2.2->2.1 migration Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 38/47] linuxboot: fix loading old kernels Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 39/47] serial: reset thri_pending on IER writes with THRI=0 Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 40/47] serial: clean up THRE/TEMT handling Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 41/47] serial: update LSR on enabling/disabling FIFOs Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 42/47] serial: only resample THR interrupt on rising edge of IER.THRI Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 43/47] sdhci: Set a default frequency clock Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 44/47] sdhci: Remove class "virtual" methods Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 45/47] sdhci: Add "sysbus" to sdhci QOM types and methods Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 46/47] sdhci: Define SDHCI PCI ids Paolo Bonzini
2014-12-15 16:38 ` [Qemu-devel] [PULL 47/47] sdhci: Support SDHCI devices on PCI Paolo Bonzini
2014-12-16 12:33 ` [Qemu-devel] [PULL 00/47] Patches for KVM, x86, SCSI, migration fixes (2014-12-15) Peter Maydell

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