From: Greg Bellows <greg.bellows@linaro.org>
To: qemu-devel@nongnu.org, serge.fdrv@gmail.com,
edgar.iglesias@gmail.com, aggelerf@ethz.ch,
peter.maydell@linaro.org
Cc: Greg Bellows <greg.bellows@linaro.org>
Subject: [Qemu-devel] [PATCH v4 12/15] target-arm: Set CPU has_el3 prop during virt init
Date: Mon, 15 Dec 2014 17:09:49 -0600 [thread overview]
Message-ID: <1418684992-8996-13-git-send-email-greg.bellows@linaro.org> (raw)
In-Reply-To: <1418684992-8996-1-git-send-email-greg.bellows@linaro.org>
Adds setting of the CPU has_el3 property based on the virt machine
secure state property during initialization. This enables/disables EL3
state during start-up. Changes include adding an additional secure state
boolean during virt CPU initialization. Also disables the ARM secure boot
by default.
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
---
v1 -> v2
- Changes CPU property name from "secure" to "has_el3"
- Change conditional to handle machine state default of secure. The check
now checks if the machine secure property has been disabled which causes the
CPU EL3 feature to be disabled.
- Add setting of arm_boot_info.secure_boot to false
v2 -> v3
- Silently ignore error if "has_el3" does not exist
- Remove board initialization of secure_boot as it is implied.
- Revise secure machine property description
v3 -> v4
- Move machine secure property description change to correct patch.
---
hw/arm/virt.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 73c68c7..a9e13ca 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -547,6 +547,7 @@ static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size)
static void machvirt_init(MachineState *machine)
{
+ VirtMachineState *vms = VIRT_MACHINE(machine);
qemu_irq pic[NUM_IRQS];
MemoryRegion *sysmem = get_system_memory();
int n;
@@ -584,6 +585,10 @@ static void machvirt_init(MachineState *machine)
}
cpuobj = object_new(object_class_get_name(oc));
+ if (!vms->secure) {
+ object_property_set_bool(cpuobj, false, "has_el3", NULL);
+ }
+
object_property_set_int(cpuobj, QEMU_PSCI_CONDUIT_HVC, "psci-conduit",
NULL);
--
1.8.3.2
next prev parent reply other threads:[~2014-12-15 23:10 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-15 23:09 [Qemu-devel] [PATCH v4 00/15] target-arm: Add CPU security extension enablement Greg Bellows
2014-12-15 23:09 ` [Qemu-devel] [PATCH v4 01/15] target-arm: Add vexpress class and machine types Greg Bellows
2014-12-15 23:09 ` [Qemu-devel] [PATCH v4 02/15] target-arm: Add vexpress a9 & a15 machine objects Greg Bellows
2014-12-15 23:09 ` [Qemu-devel] [PATCH v4 03/15] target-arm: Switch to common vexpress machine init Greg Bellows
2014-12-15 23:09 ` [Qemu-devel] [PATCH v4 04/15] target-arm: Add vexpress machine secure property Greg Bellows
2014-12-15 23:09 ` [Qemu-devel] [PATCH v4 05/15] target-arm: Change vexpress daughterboard init arg Greg Bellows
2014-12-15 23:09 ` [Qemu-devel] [PATCH v4 06/15] target-arm: Add virt class and machine types Greg Bellows
2014-12-15 23:09 ` [Qemu-devel] [PATCH v4 07/15] target-arm: Add virt machine secure property Greg Bellows
2014-12-15 23:09 ` [Qemu-devel] [PATCH v4 08/15] target-arm: Add feature unset function Greg Bellows
2014-12-15 23:09 ` [Qemu-devel] [PATCH v4 09/15] target-arm: Add ARMCPU secure property Greg Bellows
2014-12-15 23:09 ` [Qemu-devel] [PATCH v4 10/15] target-arm: Add arm_boot_info secure_boot control Greg Bellows
2014-12-15 23:09 ` [Qemu-devel] [PATCH v4 11/15] target-arm: Enable CPU has_el3 prop during VE init Greg Bellows
2014-12-15 23:09 ` Greg Bellows [this message]
2014-12-15 23:09 ` [Qemu-devel] [PATCH v4 13/15] target-arm: Breakout integratorcp and versatilepb cpu init Greg Bellows
2014-12-15 23:09 ` [Qemu-devel] [PATCH v4 14/15] target-arm: Disable EL3 on unsupported machines Greg Bellows
2014-12-15 23:09 ` [Qemu-devel] [PATCH v4 15/15] target-arm: add cpu feature EL3 to CPUs with Security Extensions Greg Bellows
2014-12-16 18:42 ` [Qemu-devel] [PATCH v4 00/15] target-arm: Add CPU security extension enablement Peter Maydell
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