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From: Leon Alrae <leon.alrae@imgtec.com>
To: qemu-devel@nongnu.org
Cc: "Maciej W. Rozycki" <macro@codesourcery.com>,
	Nathan Froyd <froydnj@codesourcery.com>
Subject: [Qemu-devel] [PULL 13/30] target-mips: Correct MIPS16/microMIPS branch size calculation
Date: Tue, 16 Dec 2014 19:48:59 +0000	[thread overview]
Message-ID: <1418759356-14242-14-git-send-email-leon.alrae@imgtec.com> (raw)
In-Reply-To: <1418759356-14242-1-git-send-email-leon.alrae@imgtec.com>

From: "Maciej W. Rozycki" <macro@codesourcery.com>

Correct MIPS16/microMIPS branch size calculation in PC adjustment
needed:

- to set the value of CP0.ErrorEPC at the entry to the reset exception,

- for the purpose of branch reexecution in the context of device I/O.

Follow the approach taken in `exception_resume_pc' for ordinary, Debug
and NMI exceptions.

MIPS16 and microMIPS branches can be 2 or 4 bytes in size and that has
to be reflected in calculation.  Original MIPS ISA branches, which is
where this code originates from, are always 4 bytes long, just as all
original MIPS ISA instructions.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 target-mips/translate.c | 3 ++-
 translate-all.c         | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/target-mips/translate.c b/target-mips/translate.c
index a5a5ca4..b5d5b39 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -19439,7 +19439,8 @@ void cpu_state_reset(CPUMIPSState *env)
     if (env->hflags & MIPS_HFLAG_BMASK) {
         /* If the exception was raised from a delay slot,
            come back to the jump.  */
-        env->CP0_ErrorEPC = env->active_tc.PC - 4;
+        env->CP0_ErrorEPC = (env->active_tc.PC
+                             - (env->hflags & MIPS_HFLAG_B16 ? 2 : 4));
     } else {
         env->CP0_ErrorEPC = env->active_tc.PC;
     }
diff --git a/translate-all.c b/translate-all.c
index cf05472..d930a5c 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -1540,7 +1540,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
        branch.  */
 #if defined(TARGET_MIPS)
     if ((env->hflags & MIPS_HFLAG_BMASK) != 0 && n > 1) {
-        env->active_tc.PC -= 4;
+        env->active_tc.PC -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4);
         cpu->icount_decr.u16.low++;
         env->hflags &= ~MIPS_HFLAG_BMASK;
     }
-- 
2.1.0

  parent reply	other threads:[~2014-12-16 19:50 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-16 19:48 [Qemu-devel] [PULL 00/30] target-mips queue Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 01/30] target-mips: Correct the handling of register #72 on writes Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 02/30] target-mips: Make CP1.FIR read-only here too Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 03/30] target-mips: Add 5KEc and 5KEf MIPS64r2 processors Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 04/30] target-mips: Make CP0.Config4 and CP0.Config5 registers signed Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 05/30] target-mips: Add M14K and M14Kc MIPS32r2 microMIPS processors Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 06/30] target-mips: Enable vectored interrupt support for the 74Kf CPU Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 07/30] target-mips: Fix formatting in `decode_extended_mips16_opc' Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 08/30] target-mips: Fix formatting in `mips_defs' Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 09/30] target-mips: Fix formatting in `decode_opc' Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 10/30] target-mips: Make `helper_float_cvtw_s' consistent with the remaining helpers Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 11/30] target-mips: Remove unused `FLOAT_OP' macro Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 12/30] target-mips: Restore the order of helpers Leon Alrae
2014-12-16 19:48 ` Leon Alrae [this message]
2014-12-16 19:49 ` [Qemu-devel] [PULL 14/30] target-mips: Correct the handling of writes to CP0.Status for MIPSr6 Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 15/30] target-mips: Correct the writes to Status and Cause registers via gdbstub Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 16/30] target-mips: Fix the 64-bit case for microMIPS MOVE16 and MOVEP Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 17/30] target-mips: Output CP0.Config2-5 in the register dump Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 18/30] target-mips: Fix CP0.Config3.ISAOnExc write accesses Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 19/30] target-mips: Tighten ISA level checks Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 20/30] target-mips: Correct 32-bit address space wrapping Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 21/30] target-mips: gdbstub: Clean up FPU register handling Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 22/30] target-mips: Also apply the CP0.Status mask to MTTC0 Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 23/30] linux-user: Use the 5KEf processor for 64-bit emulation Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 24/30] target-mips: Add missing calls to synchronise SoftFloat status Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 25/30] target-mips: Use local float status pointer across MSA macros Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 26/30] target-mips: Fix DisasContext's ulri member initialization Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 27/30] target-mips: convert single case switch into if statement Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 28/30] disas/mips: remove unused mips_msa_control_names_numeric[32] Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 29/30] disas/mips: disable unused mips16_to_32_reg_map[] Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 30/30] target-mips: remove excp_names[] from linux-user as it is unused Leon Alrae
2014-12-17 17:31 ` [Qemu-devel] [PULL 00/30] target-mips queue Peter Maydell

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