From: Leon Alrae <leon.alrae@imgtec.com>
To: qemu-devel@nongnu.org
Cc: "Maciej W. Rozycki" <macro@codesourcery.com>
Subject: [Qemu-devel] [PULL 07/30] target-mips: Fix formatting in `decode_extended_mips16_opc'
Date: Tue, 16 Dec 2014 19:48:53 +0000 [thread overview]
Message-ID: <1418759356-14242-8-git-send-email-leon.alrae@imgtec.com> (raw)
In-Reply-To: <1418759356-14242-1-git-send-email-leon.alrae@imgtec.com>
From: "Maciej W. Rozycki" <macro@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
target-mips/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index f0b8e6f..643214a 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -11099,7 +11099,7 @@ static int decode_extended_mips16_opc (CPUMIPSState *env, DisasContext *ctx)
break;
#if defined(TARGET_MIPS64)
case M16_OPC_LD:
- check_mips_64(ctx);
+ check_mips_64(ctx);
gen_ld(ctx, OPC_LD, ry, rx, offset);
break;
#endif
--
2.1.0
next prev parent reply other threads:[~2014-12-16 20:05 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-16 19:48 [Qemu-devel] [PULL 00/30] target-mips queue Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 01/30] target-mips: Correct the handling of register #72 on writes Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 02/30] target-mips: Make CP1.FIR read-only here too Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 03/30] target-mips: Add 5KEc and 5KEf MIPS64r2 processors Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 04/30] target-mips: Make CP0.Config4 and CP0.Config5 registers signed Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 05/30] target-mips: Add M14K and M14Kc MIPS32r2 microMIPS processors Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 06/30] target-mips: Enable vectored interrupt support for the 74Kf CPU Leon Alrae
2014-12-16 19:48 ` Leon Alrae [this message]
2014-12-16 19:48 ` [Qemu-devel] [PULL 08/30] target-mips: Fix formatting in `mips_defs' Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 09/30] target-mips: Fix formatting in `decode_opc' Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 10/30] target-mips: Make `helper_float_cvtw_s' consistent with the remaining helpers Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 11/30] target-mips: Remove unused `FLOAT_OP' macro Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 12/30] target-mips: Restore the order of helpers Leon Alrae
2014-12-16 19:48 ` [Qemu-devel] [PULL 13/30] target-mips: Correct MIPS16/microMIPS branch size calculation Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 14/30] target-mips: Correct the handling of writes to CP0.Status for MIPSr6 Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 15/30] target-mips: Correct the writes to Status and Cause registers via gdbstub Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 16/30] target-mips: Fix the 64-bit case for microMIPS MOVE16 and MOVEP Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 17/30] target-mips: Output CP0.Config2-5 in the register dump Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 18/30] target-mips: Fix CP0.Config3.ISAOnExc write accesses Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 19/30] target-mips: Tighten ISA level checks Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 20/30] target-mips: Correct 32-bit address space wrapping Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 21/30] target-mips: gdbstub: Clean up FPU register handling Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 22/30] target-mips: Also apply the CP0.Status mask to MTTC0 Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 23/30] linux-user: Use the 5KEf processor for 64-bit emulation Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 24/30] target-mips: Add missing calls to synchronise SoftFloat status Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 25/30] target-mips: Use local float status pointer across MSA macros Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 26/30] target-mips: Fix DisasContext's ulri member initialization Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 27/30] target-mips: convert single case switch into if statement Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 28/30] disas/mips: remove unused mips_msa_control_names_numeric[32] Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 29/30] disas/mips: disable unused mips16_to_32_reg_map[] Leon Alrae
2014-12-16 19:49 ` [Qemu-devel] [PULL 30/30] target-mips: remove excp_names[] from linux-user as it is unused Leon Alrae
2014-12-17 17:31 ` [Qemu-devel] [PULL 00/30] target-mips queue Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1418759356-14242-8-git-send-email-leon.alrae@imgtec.com \
--to=leon.alrae@imgtec.com \
--cc=macro@codesourcery.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).