From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36548) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y6JvG-0004fT-DM for qemu-devel@nongnu.org; Wed, 31 Dec 2014 09:06:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Y6JvB-00089z-G1 for qemu-devel@nongnu.org; Wed, 31 Dec 2014 09:06:50 -0500 Received: from mail-we0-x232.google.com ([2a00:1450:400c:c03::232]:56386) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y6JvB-00089t-8w for qemu-devel@nongnu.org; Wed, 31 Dec 2014 09:06:45 -0500 Received: by mail-we0-f178.google.com with SMTP id p10so2448703wes.9 for ; Wed, 31 Dec 2014 06:06:44 -0800 (PST) From: Colin Leitner Date: Wed, 31 Dec 2014 15:06:05 +0100 Message-Id: <1420034767-26608-1-git-send-email-colin.leitner@gmail.com> In-Reply-To: <1419945208-13971-1-git-send-email-colin.leitner@gmail.com> References: <1419945208-13971-1-git-send-email-colin.leitner@gmail.com> Subject: [Qemu-devel] [PATCH v2 0/2] Reworked Zynq GPIO model List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.crosthwaite@xilinx.com, Colin Leitner Hello everyone, this is the second version with most of the review points addressed. Two notable exceptions: * The bank registers are handled like in the original patch * I couldn't get rid of the intermediate set_irq callbacks because qdev_init_gpio_in_named won't allow me to set the opaque data to another value. I retested basic I/O on different banks and IRQ handling. Both with the stock Linux 3.12 driver. Cheers, Colin Colin Leitner (2): zynq_gpio: GPIO model for Zynq SoC xilinx_zynq: Add zynq-gpio to the machine hw/arm/xilinx_zynq.c | 2 + hw/gpio/Makefile.objs | 1 + hw/gpio/zynq-gpio.c | 386 +++++++++++++++++++++++++++++++++++++++++++++++++ hw/gpio/zynq-gpio.h | 79 ++++++++++ 4 files changed, 468 insertions(+) create mode 100644 hw/gpio/zynq-gpio.c create mode 100644 hw/gpio/zynq-gpio.h -- 1.7.10.4