From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54142) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y8car-0008Oq-So for qemu-devel@nongnu.org; Tue, 06 Jan 2015 17:27:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Y8can-0004oE-Q2 for qemu-devel@nongnu.org; Tue, 06 Jan 2015 17:27:17 -0500 Received: from mail-we0-x22e.google.com ([2a00:1450:400c:c03::22e]:40418) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y8can-0004o9-Ia for qemu-devel@nongnu.org; Tue, 06 Jan 2015 17:27:13 -0500 Received: by mail-we0-f174.google.com with SMTP id k48so157688wev.5 for ; Tue, 06 Jan 2015 14:27:12 -0800 (PST) From: Colin Leitner Date: Tue, 6 Jan 2015 23:26:41 +0100 Message-Id: <1420583203-12404-1-git-send-email-colin.leitner@gmail.com> In-Reply-To: <1419945208-13971-1-git-send-email-colin.leitner@gmail.com> References: <1419945208-13971-1-git-send-email-colin.leitner@gmail.com> Subject: [Qemu-devel] [PATCH v3 0/2] Reworked Zynq GPIO model List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.crosthwaite@xilinx.com, Colin Leitner Hello everyone, this is the third version of the Zynq GPIO model patch. It includes * mostly code cleanup (variable naming, removed unneeded casts, added some local vars for better readability) * moved zynq-gpio.h to include/hw/gpio * enhancement in the reset/init logic to ensure that reset sets the IRQ output lines to 0. Regards, Colin Colin Leitner (2): zynq_gpio: GPIO model for Zynq SoC xilinx_zynq: Add zynq-gpio to the machine hw/arm/xilinx_zynq.c | 2 + hw/gpio/Makefile.objs | 1 + hw/gpio/zynq-gpio.c | 402 +++++++++++++++++++++++++++++++++++++++++++ include/hw/gpio/zynq-gpio.h | 79 +++++++++ 4 files changed, 484 insertions(+) create mode 100644 hw/gpio/zynq-gpio.c create mode 100644 include/hw/gpio/zynq-gpio.h -- 1.7.10.4